From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 927D7C02183 for ; Tue, 14 Jan 2025 08:56:11 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D6A9680285; Tue, 14 Jan 2025 09:56:09 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="N99hHa0F"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 6FF9A80657; Tue, 14 Jan 2025 09:56:08 +0100 (CET) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9449B80085 for ; Tue, 14 Jan 2025 09:56:05 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=maz@kernel.org Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 6EAF75C2953; Tue, 14 Jan 2025 08:55:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EC2A9C4CEDD; Tue, 14 Jan 2025 08:56:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736844964; bh=NhOJNil4b/BHnzCPjs4f3DC/sVbktww12mJ+dQ8yyZ4=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=N99hHa0FM5cICihxRXlaEHJp+FdbglU+tNZcZrcluWjRY0MAEy/3Wk0QUujJg+S1H zA2mW4eJeROhvCykakAex/R6f21pnnUBpexEvNqrSjj6113WqQAVKlU3RdXG1kDN1u d5t9x5kTAdDCVZZqJX1V0TxZznEQXR9RYhu+uRycCSBNAXOHHawyCk0goaGSCdP0FN FnyW67D34JjE1CY40B9sckylgBqWDR5zvbqlUsFH9fSy7z64kJtQJ4E3cHXU4JqpIn 3Byiq06ydnMRIuP1vOGTrsBzf5TZFTyPDOudoQYvUyE9YT6yQPO7ucw2qh7AoiLUyL /QjgfIfqjJQOw== Received: from ip-185-104-136-29.ptr.icomera.net ([185.104.136.29] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tXciO-00C2Ok-FP; Tue, 14 Jan 2025 08:56:01 +0000 Date: Tue, 14 Jan 2025 08:55:56 +0000 Message-ID: <87a5btrcyr.wl-maz@kernel.org> From: Marc Zyngier To: Ahmad Fatoum Cc: =?UTF-8?B?UGllcnJlLUNsw6ltZW50?= Tosi , Caleb Connolly , Andre Przywara , Neil Armstrong , Patrick Rudolph , Peter Hoyes , Simon Glass , Sumit Garg , Tom Rini , u-boot-qcom@groups.io, Ilias Apalodimas , u-boot@lists.denx.de Subject: Re: [PATCH] armv8: mmu: don't switch to emergency tlb when adding a dynamic mapping In-Reply-To: <25177dc9-628f-4798-9ee8-b1a4a7845b19@pengutronix.de> References: <20250108142235.1194640-1-caleb.connolly@linaro.org> <86septwdlr.wl-maz@kernel.org> <37c914cd-8f66-4474-8b88-7464b256cd49@linaro.org> <25177dc9-628f-4798-9ee8-b1a4a7845b19@pengutronix.de> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.104.136.29 X-SA-Exim-Rcpt-To: a.fatoum@pengutronix.de, ptosi@google.com, caleb.connolly@linaro.org, andre.przywara@arm.com, neil.armstrong@linaro.org, patrick.rudolph@9elements.com, Peter.Hoyes@arm.com, sjg@chromium.org, sumit.garg@linaro.org, trini@konsulko.com, u-boot-qcom@groups.io, ilias.apalodimas@linaro.org, u-boot@lists.denx.de X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Tue, 14 Jan 2025 08:38:48 +0000, Ahmad Fatoum wrote: >=20 > Hi Pierre, >=20 > On 08.01.25 16:52, Pierre-Cl=C3=A9ment Tosi wrote: > > Hi Caleb, > >=20 > > On Wed, Jan 08, 2025 at 04:19:07PM +0100, Caleb Connolly wrote: > >> Hi Marc, > >> > >> Thanks for your comments. > >> > >> On 08/01/2025 16:05, Marc Zyngier wrote: > >>> On Wed, 08 Jan 2025 14:22:24 +0000, > >>> Caleb Connolly wrote: > >>>> > >>>> This seems to cause crashes on a bunch of Qualcomm platforms. It's s= afer > >>>> to just update the live table and flush it. > >>> > >>> You may want to provide a bit more information, because that's not > >>> much to go on, really. > >> > >> Best I have is "the board hangs and then resets when trying to switch > >> pagetables", I didn't manage to narrow it down exactly, but since it > >> seems to work to update the tables without switching that feels like a > >> better approach at least for now. > >> > >> In hindsight, this mmu_map_region() function is not great in a lot of > >> ways, I'm still getting my head around the MMU and I expect this will > >> keep being improved. > >=20 > > Yes, [1] should not have used map_range() on live PTs as it assumes that > >=20 > > 1. the PTs it modifies aren't live so doesn't perform Break Before Make; >=20 > Quoting ARM ARM (L.a) D8.17.1 "Using break-before-make when updating tran= slation > table entries": >=20 > If multiple execution threads use the same translation tables, then whe= n a > translation table entry is modified in one or more of the following way= s, > the architecture requires software to use a break-before-make sequence:= [...] >=20 > So I am wondering: Does the break-before-make requirement even apply to a > single-threaded software like U-Boot? Yes, this equally applies, as the page-table walker is a separate agent in the system, and can *speculatively* walk page tables any time it wants. These walks are allowed to be cached as TLBs, and this can result in a single VA translating to multiple PAs. Don't do that. M. --=20 Without deviation from the norm, progress is not possible.