Re: [PATCH] Add Phytec i.MX93 support

Yannic Moog
2024-01-19T07:21:40Z

Hello Mathieu

As a heads-up: you need to rebase as am62 (doc) got applied by Tom.

On Wed, 2024-01-17 at 08:52 +0100, Mathieu Othacehe wrote:
> Add support for the Phytec i.MX93 Segin evaluation kit. The SoM consists
> of an NXP i.MX93 dual A55 CPU. The SoM is mounted on a Phytec Segin SBC.
>
> Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
> ---
>  arch/arm/dts/Makefile                         |    3 +-
>  arch/arm/dts/imx93-phycore-segin-u-boot.dtsi  |  274 +++
>  arch/arm/dts/imx93-phycore-segin.dts          |   95 +
>  arch/arm/dts/imx93-phycore-som.dtsi           |   64 +
>  arch/arm/mach-imx/imx9/Kconfig                |    6 +
>  board/phytec/common/mmc.c                     |   49 +
>  board/phytec/imx93_phycore/Kconfig            |   21 +
>  board/phytec/imx93_phycore/MAINTAINERS        |   10 +
>  board/phytec/imx93_phycore/Makefile           |   16 +
>  board/phytec/imx93_phycore/imx93_phycore.c    |   89 +
>  board/phytec/imx93_phycore/imx93_phycore.env  |   96 +
>  .../phytec/imx93_phycore/lpddr4_timing_1GB.c  | 1546 +++++++++++++++++
>  board/phytec/imx93_phycore/spl.c              |  181 ++
>  configs/imx93_phycore_defconfig               |  147 ++
>  doc/board/phytec/imx93_phycore.rst            |   68 +
>  doc/board/phytec/index.rst                    |    1 +
>  include/configs/imx93_phycore.h               |   47 +
>  17 files changed, 2712 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/imx93-phycore-segin-u-boot.dtsi
>  create mode 100644 arch/arm/dts/imx93-phycore-segin.dts
>  create mode 100644 arch/arm/dts/imx93-phycore-som.dtsi
>  create mode 100644 board/phytec/common/mmc.c
>  create mode 100644 board/phytec/imx93_phycore/Kconfig
>  create mode 100644 board/phytec/imx93_phycore/MAINTAINERS
>  create mode 100644 board/phytec/imx93_phycore/Makefile
>  create mode 100644 board/phytec/imx93_phycore/imx93_phycore.c
>  create mode 100644 board/phytec/imx93_phycore/imx93_phycore.env
>  create mode 100644 board/phytec/imx93_phycore/lpddr4_timing_1GB.c
>  create mode 100644 board/phytec/imx93_phycore/spl.c
>  create mode 100644 configs/imx93_phycore_defconfig
>  create mode 100644 doc/board/phytec/imx93_phycore.rst
>  create mode 100644 include/configs/imx93_phycore.h
>
>

<snip>

>
> diff --git a/doc/board/phytec/imx93_phycore.rst b/doc/board/phytec/imx93_phycore.rst
> new file mode 100644
> index 00000000000..f9b87691cdc
> --- /dev/null
> +++ b/doc/board/phytec/imx93_phycore.rst
> @@ -0,0 +1,68 @@
> +.. SPDX-License-Identifier: GPL-2.0+
> +
> +imx93_phytec
> +============

rename it to phyCORE-i.MX 93 please, as this is the official name. See
https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/

> +
> +U-Boot for the NXP i.MX93 Phytec SoM of a Segin board

Same here; Use official naming, please.

> +
> +Quick Start
> +-----------
> +
> +- Get and Build the ARM Trusted firmware
> +- Get the DDR firmware
> +- Get ahab-container.img
> +- Build U-Boot
> +- Boot
> +
> +Get and Build the ARM Trusted firmware
> +--------------------------------------
> +
> +Note: srctree is U-Boot source directory
> +Get ATF from: https://github.com/nxp-imx/imx-atf/

Is the trusted-firmware-a upstream version working? If so, please use that instead.

> +branch: lf_v2.8
> +
> +.. code-block:: bash
> +
> +   $ unset LDFLAGS
> +   $ make PLAT=imx93 bl31
> +   $ cp build/imx93/release/bl31.bin $(srctree)
> +
> +Get the DDR firmware
> +--------------------
> +
> +.. code-block:: bash
> +
> +   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin
> +   $ chmod +x firmware-imx-8.21.bin
> +   $ ./firmware-imx-8.21.bin
> +   $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree)
> +
> +Get ahab-container.img
> +---------------------------------------
> +
> +.. code-block:: bash
> +
> +   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.10.bin
> +   $ chmod +x firmware-sentinel-0.10.bin
> +   $ ./firmware-sentinel-0.10.bin
> +   $ cp firmware-sentinel-0.10/mx93a0-ahab-container.img $(srctree)
> +
> +Build U-Boot
> +------------
> +
> +.. code-block:: bash
> +
> +   $ export CROSS_COMPILE=aarch64-poky-linux-

Leave this as generic as possible please. ARM toolchain should be sufficient.

> +   $ make imx93_phytec_defconfig
> +   $ make
> +
> +Burn the flash.bin to MicroSD card offset 32KB:
> +
> +.. code-block:: bash
> +
> +   $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
> +
> +Boot
> +----
> +
> +Set Boot switch to SD boot

Add info to what position(s) the boot switches must be set.

> diff --git a/doc/board/phytec/index.rst b/doc/board/phytec/index.rst
> index 9996bce9741..a740f0cbae4 100644
> --- a/doc/board/phytec/index.rst
> +++ b/doc/board/phytec/index.rst
> @@ -7,5 +7,6 @@ PHYTEC
>     :maxdepth: 2
>
>     imx8mm-phygate-tauri-l
> +   imx93_phycore
>     phycore-imx8mm
>     phycore-imx8mp
> diff --git a/include/configs/imx93_phycore.h b/include/configs/imx93_phycore.h
> new file mode 100644
> index 00000000000..ee1322c9b52
> --- /dev/null
> +++ b/include/configs/imx93_phycore.h
> @@ -0,0 +1,47 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2022 NXP
> + * Copyright (C) 2023 PHYTEC Messtechnik GmbH
> + * Christoph Stoidner <c.stoidner@phytec.de>
> + */
> +
> +#ifndef __IMX93_PHYCORE_H
> +#define __IMX93_PHYCORE_H
> +
> +#include <linux/sizes.h>
> +#include <linux/stringify.h>
> +#include <asm/arch/imx-regs.h>
> +
> +#define CFG_SYS_UBOOT_BASE \
> + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
> +
> +#define BOOT_TARGET_DEVICES(func) \
> + func(MMC, mmc, 0) \
> + func(MMC, mmc, 1)
> +
> +#include <config_distro_bootcmd.h>

I don't see a specific reason to have this include separate?! Group it with the others, please.

Yannic

> +
> +/* Initial environment variables */
> +#define CFG_EXTRA_ENV_SETTINGS BOOTENV
> +
> +#define CFG_SYS_INIT_RAM_ADDR        0x80000000
> +#define CFG_SYS_INIT_RAM_SIZE        0x200000
> +
> +#define CFG_SYS_SDRAM_BASE           0x80000000
> +#define PHYS_SDRAM                   0x80000000
> +#define PHYS_SDRAM_SIZE              0x80000000
> +
> +#define CFG_SYS_FSL_USDHC_NUM 2
> +
> +/* Using ULP WDOG for reset */
> +#define WDOG_BASE_ADDR          WDG3_BASE_ADDR
> +
> +#if defined(CONFIG_CMD_NET)
> +#define PHY_ANEG_TIMEOUT 20000
> +#endif
> +
> +#ifdef CONFIG_IMX_MATTER_TRUSTY
> +#define NS_ARCH_ARM64 1
> +#endif
> +
> +#endif