From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B350BCD11DF for ; Tue, 26 Mar 2024 09:22:02 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id CD93888018; Tue, 26 Mar 2024 10:22:00 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="cBd6xpHL"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 40DCA88013; Tue, 26 Mar 2024 10:22:00 +0100 (CET) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 30D3A88019 for ; Tue, 26 Mar 2024 10:21:58 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=maz@kernel.org Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id B3E1A601D9; Tue, 26 Mar 2024 09:21:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5C3EAC433C7; Tue, 26 Mar 2024 09:21:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711444916; bh=l0gAGVl4u+2oG45ijUK0DxaU2aEaXQRCx0d9vNmqk8k=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=cBd6xpHLjMFIac0D4Cjx5TRac0T8/aIzxUUZgnXH6vRkOPBTtCp1BnCd8+Bof3Z58 OcZTDGvSDJKmBtWrXEk+H6dbm2bH/FzKx/bbXT1FEye8pX7e0B4OZ8tisPn1fXy9Ik yffAy2lKdmF3CvsTlFgf1onMFtyDenK8fvdbf8yJFsE6wej/hSDulkRs37YC63R8kq sEX6GzvFRw1MdRdDlvyvfvgh5vl9T4vaN2ci6THWbFdyQLjxp64PBZ/yQW3qTd1QLz cWmcP7erOw4B8y64c1cdA6K7nKhTEM9qdm5/IfVMw9Fic4MLhEYjluczoL2zq9JGvz x77q6uvOYrIiA== Received: from 213-229-0-18.static.upcbusiness.at ([213.229.0.18] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1rp30D-00FoXo-Pg; Tue, 26 Mar 2024 09:21:53 +0000 Date: Tue, 26 Mar 2024 09:21:52 +0000 Message-ID: <87bk71s5zj.wl-maz@kernel.org> From: Marc Zyngier To: =?UTF-8?B?UGllcnJlLUNsw6ltZW50?= Tosi Cc: Fabio Estevam , u-boot@lists.denx.de, Tom Rini , Stefano Babic Subject: Re: [PATCH] arm64: Fix map_range() not splitting mapped blocks In-Reply-To: References: <43haokus4jdxguk4arig5tsqcgq2wbezwpbj7oti6pdkvrfual@wa7vz2iypcv5> <86o7bazheg.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 213.229.0.18 X-SA-Exim-Rcpt-To: ptosi@google.com, festevam@gmail.com, u-boot@lists.denx.de, trini@konsulko.com, sbabic@denx.de X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Tue, 19 Mar 2024 12:39:26 +0000, Pierre-Cl=C3=A9ment Tosi wrote: >=20 > Hi Fabio, >=20 > On Tue, Mar 19, 2024 at 09:13:12AM -0300, Fabio Estevam wrote: > > Hi Pierre, > >=20 > > On Tue, Mar 19, 2024 at 8:39=E2=80=AFAM Pierre-Cl=C3=A9ment Tosi wrote: > >=20 > > > This means gd->arch.tlb_addr pointing to the live PTs during setup_pg= tables(). > > > > > > In arch/arm/cpu/armv8, setup_all_pgtables() runs with SCTLR_ELx.M uns= et. > > > > > > In arch/arm/cpu/armv8/fsl-layerscape, setup_pgtables() is called twic= e: > > > > > > - early_mmu_setup() calls it with SCTLR_ELx.M unset; > > > - final_mmu_setup() overwrites gd->arch.tlb_addr before calling it i= ff > > > CFG_SYS_MEM_RESERVE_SECURE is defined i.e. if CONFIG_SYS_SOC=3D"fs= l-layerscape" > > > so that gets auto-included thro= ugh > > > . > > > > > > So can CONFIG_FSL_LAYERSCAPE be set while CONFIG_SYS_SOC !=3D "fsl-la= yerscape"? > >=20 > > No, this cannot happen. >=20 > Thanks for confirming. >=20 > For clarity, it might then make sense to drop that #ifdef in final_mmu_se= tup(). >=20 > > Only the following Layerscape SoCs select CONFIG_FSL_LAYERSCAPE > > in arch/arm/cpu/armv8/fsl-layerscape/Kconfig: > > LS1012A, LS1028A, LS1043A, LS1046A, LS1088A, LS2080A, LX2162A and LX216= 0A > >=20 > > I saw the original boot problem with the i.MX8QX. > >=20 > > The i.MX8QX is part of the i.MX family, not the Layerscape family. >=20 > Sure. >=20 > To be clear, the concern here was that split_block() doesn't perform what= the > CPU architecture requires when modifying page tables that the MMU is usin= g and > the question therefore was: can setup_pgtables() be called on such live P= Ts? >=20 > For most AArch64 U-Boot ports (including the i.MX family), the answer is = trivial > because they use the arch code i.e. setup_all_pgtables(). However, as > fsl-layerscape re-implements mmu_setup(), it had to be looked at separate= ly, > hence my question, which you answered above. Thanks for the details. With that, Reviewed-by: Marc Zyngier M. --=20 Without deviation from the norm, progress is not possible.