From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E61B1C3525A for ; Wed, 26 Jan 2022 03:05:01 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 25EFB83384; Wed, 26 Jan 2022 04:04:59 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=debian.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; secure) header.d=debian.org header.i=@debian.org header.b="eGTFMvnk"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 0238E830D0; Wed, 26 Jan 2022 04:04:58 +0100 (CET) Received: from cascadia.aikidev.net (cascadia.aikidev.net [173.255.214.101]) by phobos.denx.de (Postfix) with ESMTP id 9D2E1837D7 for ; Wed, 26 Jan 2022 04:04:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=debian.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=vagrant@debian.org Received: from localhost (unknown [IPv6:2600:3c01:e000:21:21:21:0:100e]) (Authenticated sender: vagrant@cascadia.debian.net) by cascadia.aikidev.net (Postfix) with ESMTPSA id 18B2E1AB5A; Tue, 25 Jan 2022 19:04:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=debian.org; s=1.vagrant.user; t=1643166293; bh=ckYg0IPXGThrmwYCBikB7odxC5WENgGpAWE4VQ3aezk=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=eGTFMvnkZ03udWRPm6p+MZ+zG0L3+pBpcX1Xw1PxJVaCJi6wkGCIZcx/o7WNkOb1s RezsY+kNWpTttDSZjD6OBD0+72zy0mDMPLcLavX/b9z663t8iYroXA9JntWKH9y9DJ VUJ9dxojOFRPNCFN7jii+98KweMrGRYTjaF56/2d9+d3i+iIWHibzvU+SRpxKPIDMB nRE7dxDH/O+cUbcI2mNoH69qrv/UQ1UtYQucOg+1eur7kPIoVFsUwCQXM5UhhD9kfD DEasd5RjUqa4ccq/BNWPv3cS83KIGFYIepZ1IZoLyJ3wbMLOEeKWT5cgoBoR5RKy9O 2akEegCm1bO4g== From: Vagrant Cascadian To: Aurelien Jarno Cc: 1003490@bugs.debian.org, u-boot@lists.denx.de, debian-riscv@lists.debian.org Subject: Re: Bug#1003490: u-boot: FTBFS on arch:all with qemu-ppce500 target In-Reply-To: <87ilu7b96a.fsf@ponder> References: <87wnj7oz6b.fsf@ponder> <87sftt4wi4.fsf@ponder> <87ilu7b96a.fsf@ponder> Date: Tue, 25 Jan 2022 19:04:42 -0800 Message-ID: <87fspbb3jp.fsf@ponder> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha512; protocol="application/pgp-signature" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean --=-=-= Content-Type: text/plain Content-Transfer-Encoding: quoted-printable On 2022-01-25, Vagrant Cascadian wrote: > On 2022-01-15, Aurelien Jarno wrote: >> On 2022-01-11 16:40, Vagrant Cascadian wrote: >>> On 2022-01-11, Lennart Sorensen wrote: >>> > On Mon, Jan 10, 2022 at 05:10:04PM -0800, Vagrant Cascadian wrote: >>> >> Something in the toolchain recently changed which causes u-boot arch= :all >>> >> build to FTBFS... I suspect binutils, as building in "bookworm" still >>> >> works fine where binutils hasn't yet migrated. >>> >>=20 >>> >> On arch:all builds the qemu-ppce500 target is cross-compiled. >>> >>=20 >>> >> Full log: >>> >>=20 >>> >> https://buildd.debian.org/status/fetch.php?pkg=3Du-boot&arch=3Dall= &ver=3D2022.01%2Bdfsg-1&stamp=3D1641860624&raw=3D0 >>> >>=20 >>> >> The hopefully relevent lines from the build log: ... >>> >> {standard input}: Assembler messages: >>> >> {standard input}:127: Error: unrecognized opcode: `tlbre' >>> >> {standard input}:418: Error: unrecognized opcode: `tlbre' >>> >> {standard input}:821: Error: unrecognized opcode: `msync' >>> >> {standard input}:821: Error: unrecognized opcode: `tlbwe' >>> >> {standard input}:884: Error: unrecognized opcode: `tlbsx' >>> >> make[4]: *** [/<>/scripts/Makefile.build:253: arch/powe= rpc/cpu/mpc85xx/tlb.o] Error 1 >>> >> make[3]: *** [/<>/Makefile:1810: arch/powerpc/cpu/mpc85= xx] Error 2 >>> >> make[3]: *** Waiting for unfinished jobs.... >>> >> powerpc-linux-gnu-gcc -Wp,-MD,arch/powerpc/lib/.traps.o.d -nost > ... >>> The binutils versions appear to be: >>>=20 >>> succeeding, bookworm 2.37-10.1 >>> failing, sid 2.37.50.20220106-2 >>>=20 >> >> Yep, this is due to commit b25f942e18d6ecd7ec3e2d2e9930eb4f996c258a on >> the binutils side [1], which changes the behavior of `.machine` >> directives to override, rather than augment, the base CPU. GCC is called >> with -Wa,-me500 to enable PowerPC e500 instructions on the assembler >> side, but as the default GCC machine is ppc, a `.set machine ppc` is >> emitted at the beginning of the assembly code. >> >> One option would be to force the CPU to e500 on the GCC side, however >> support for it has been removed. The options is therefore to force the >> machine in the assembly code. This is what the attached patch does. > > Somehow I missed that you had attached a patch! I will try to get this > tested and uploaded to Debian soon... Your patch fixed building qemu-ppce500, but now I think we have a potentially similar problem with qemu-riscv64 and qemu-riscv64_smode: /<>/arch/riscv/cpu/cpu.c: Assembler messages: /<>/arch/riscv/cpu/cpu.c:94: Error: unrecognized opcode `csrs sstatus,a5' /<>/arch/riscv/cpu/cpu.c:95: Error: unrecognized opcode `csrw 0x003,0' make[4]: *** [/<>/scripts/Makefile.build:254: arch/riscv/cpu/cpu.o] Error 1 make[3]: *** [/<>/Makefile:1810: arch/riscv/cpu] Error 2 make[3]: Leaving directory '/<>/debian/build/qemu-riscv64_smode' live well, vagrant >> --- u-boot-2022.01+dfsg.orig/arch/powerpc/cpu/mpc85xx/tlb.c >> +++ u-boot-2022.01+dfsg/arch/powerpc/cpu/mpc85xx/tlb.c >> @@ -50,7 +50,10 @@ void read_tlbcam_entry(int idx, u32 *val >> u32 _mas1; >>=20=20 >> mtspr(MAS0, FSL_BOOKE_MAS0(1, idx, 0)); >> - asm volatile("tlbre;isync"); >> + asm volatile(".machine push;\n" >> + ".machine e500;\n" >> + "tlbre;isync;\n" >> + ".machine pop;\n"); >> _mas1 =3D mfspr(MAS1); >>=20=20 >> *valid =3D (_mas1 & MAS1_VALID); >> @@ -109,7 +112,10 @@ void init_used_tlb_cams(void) >> /* walk all the entries */ >> for (i =3D 0; i < num_cam; i++) { >> mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0)); >> - asm volatile("tlbre;isync"); >> + asm volatile(".machine push;\n" >> + ".machine e500;\n" >> + "tlbre;isync;\n" >> + ".machine pop;"); >> if (mfspr(MAS1) & MAS1_VALID) >> use_tlb_cam(i); >> } >> @@ -183,7 +189,10 @@ void disable_tlb(u8 esel) >> #ifdef CONFIG_ENABLE_36BIT_PHYS >> mtspr(MAS7, 0); >> #endif >> - asm volatile("isync;msync;tlbwe;isync"); >> + asm volatile(".machine push;\n" >> + ".machine e500;\n" >> + "isync;msync;tlbwe;isync;\n" >> + ".machine pop;\n"); >>=20=20 >> #ifdef CONFIG_ADDR_MAP >> if (gd->flags & GD_FLG_RELOC) >> @@ -193,7 +202,11 @@ void disable_tlb(u8 esel) >>=20=20 >> static void tlbsx (const volatile unsigned *addr) >> { >> - __asm__ __volatile__ ("tlbsx 0,%0" : : "r" (addr), "m" (*addr)); >> + __asm__ __volatile__ (".machine push;\n" >> + ".machine e500;\n" >> + "tlbsx 0,%0;\n" >> + ".machine pop;\n" >> + : : "r" (addr), "m" (*addr)); >> } >>=20=20 >> /* return -1 if we didn't find anything */ --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEARYKAB0WIQRlgHNhO/zFx+LkXUXcUY/If5cWqgUCYfC6TwAKCRDcUY/If5cW qtBmAP9Ejh6LtoOJJLm8cBWL7lPeUvfaVZ9prQaGKg24cBKj1wEAsK/o9tJJI10Y EmbgHI1q7GuF9L7IQ7p53K2z/4mpXQ4= =VodX -----END PGP SIGNATURE----- --=-=-=--