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From: Marc Zyngier <maz@kernel.org>
To: Jit Loon Lim <jit.loon.lim@intel.com>
Cc: u-boot@lists.denx.de, Jagan Teki <jagan@amarulasolutions.com>,
	Marek <marex@denx.de>, Simon <simon.k.r.goldschmidt@gmail.com>,
	Tien Fong <tien.fong.chee@intel.com>,
	Kok Kiang <kok.kiang.hea@intel.com>,
	Raaj <raaj.lokanathan@intel.com>,
	Dinesh <dinesh.maniyam@intel.com>,
	Boon Khai <boon.khai.ng@intel.com>,
	Alif <alif.zakuan.yuslaimi@intel.com>,
	Teik Heng <teik.heng.chong@intel.com>,
	Hazim <muhammad.hazim.izzat.zamri@intel.com>,
	Sieu Mun Tang <sieu.mun.tang@intel.com>,
	Ying-Chun Liu <paul.liu@linaro.org>,
	Kah Jing Lee <kah.jing.lee@intel.com>
Subject: Re: [PATCH v1] cache_v8: agilex5: Disable Dcache in the SPL
Date: Wed, 21 Jun 2023 15:15:44 +0100	[thread overview]
Message-ID: <87sfakq4tr.wl-maz@kernel.org> (raw)
In-Reply-To: <20230621140651.12756-1-jit.loon.lim@intel.com>

On Wed, 21 Jun 2023 15:06:51 +0100,
Jit Loon Lim <jit.loon.lim@intel.com> wrote:
> 
> From: Kah Jing Lee <kah.jing.lee@intel.com>
> 
> Dcache feature is not enabled in SPL and enable it will cause ISR
> exception. Since the Dcache is not supported in SPL, new
> CONFIG_SPL_SYS_DISABLE_DCACHE_OPS is added to Kconfig to disable Dcache
> in SPL.
> 
> Signed-off-by: Kah Jing Lee <kah.jing.lee@intel.com>

This is missing your own SoB.

Now, I'd like to understand what you are actually trying to fix. What
is this 'ISR' exception? This isn't something the architecture
describes. Unless you are using CMOs on something that isn't memory or
for which you don't have a mapping, this should never generate an
exception.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2023-06-21 14:16 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-21 14:06 [PATCH v1] cache_v8: agilex5: Disable Dcache in the SPL Jit Loon Lim
2023-06-21 14:15 ` Marc Zyngier [this message]
2023-06-21 14:19   ` Marek Vasut
2023-06-26  9:00     ` Lim, Jit Loon
2023-06-26  9:32       ` Marc Zyngier
2023-06-21 14:19 ` Marek Vasut

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