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From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 6/6] MIPS: bootm: Add support for Vcore III linux kernel
Date: Tue, 09 Oct 2018 13:28:34 +0200	[thread overview]
Message-ID: <87zhvnickd.fsf@bootlin.com> (raw)
In-Reply-To: <bb7b68d0-ac73-d644-5812-ecec821e8ef8@gmail.com> (Daniel Schwierzeck's message of "Wed, 26 Sep 2018 21:40:13 +0200")

Hi Daniel,
 
 On mer., sept. 26 2018, Daniel Schwierzeck <daniel.schwierzeck@gmail.com> wrote:

> On 25.09.2018 15:01, Gregory CLEMENT wrote:
>> The kernels built for the Vcore III linux kernel have different
>> expectation in the way the data were passed.
>> 
>> Unlike with yamon, the command line is expected to be a single string
>> passed in argv[1]. An other expectation is that the arguments are located
>> in the cached address space.
>> 
>> However, like yamon, they expect that rd_start and rd_size was passed by
>> the bootloader in the command line of the kernel, and besides that it
>> also wait for the root=/dev/ram0.
>
> Can't you use existing boot interfaces? The preferred way would be to
> pass a device-tree blob to the kernel and let U-Boot fill the bootargs
> in that DTB. I wonder why the linux-mips guys let you add another boot
> interface. Or do you simply want to boot some legacy or propietary
> kernels?

Actually we support the dtb way, but the legacy kernel still neeeds this
see:

https://elixir.bootlin.com/linux/v4.19-rc7/source/arch/mips/generic/board-ocelot.c#L38

Gregory


>
>> 
>> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
>> ---
>>  arch/mips/lib/bootm.c | 62 +++++++++++++++++++++++++++++--------------
>>  1 file changed, 42 insertions(+), 20 deletions(-)
>> 
>> diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
>> index deca5189e3..417f5ce452 100644
>> --- a/arch/mips/lib/bootm.c
>> +++ b/arch/mips/lib/bootm.c
>> @@ -44,22 +44,38 @@ void arch_lmb_reserve(struct lmb *lmb)
>>  	lmb_reserve(lmb, sp, gd->ram_top - sp);
>>  }
>>  
>> -static void linux_cmdline_init(void)
>> +static void linux_cmdline_init(int vcoreiii)
>>  {
>> +	if (!vcoreiii) {
>> +		linux_argv = (char **)UNCACHED_SDRAM(gd->bd->bi_boot_params);
>> +		linux_argp = (char *)(linux_argv + LINUX_MAX_ARGS);
>> +	} else {
>> +		/*
>> +		 * Vcore III linux kernels expect arguments in the cached
>> +		 * address space. They also expect the command line being a
>> +		 * single string in the first argument
>> +		 */
>> +		linux_argv = (char **)(gd->bd->bi_boot_params);
>> +		linux_argp = (char *)(linux_argv + LINUX_MAX_ARGS);
>> +		linux_argv[1] = linux_argp;
>> +	}
>>  	linux_argc = 1;
>> -	linux_argv = (char **)UNCACHED_SDRAM(gd->bd->bi_boot_params);
>>  	linux_argv[0] = 0;
>> -	linux_argp = (char *)(linux_argv + LINUX_MAX_ARGS);
>>  }
>>  
>> -static void linux_cmdline_set(const char *value, size_t len)
>> +static void linux_cmdline_set(const char *value, size_t len, int vcoreiii)
>>  {
>> -	linux_argv[linux_argc] = linux_argp;
>>  	memcpy(linux_argp, value, len);
>> -	linux_argp[len] = 0;
>> -
>> +	if (!vcoreiii)	{
>> +		linux_argv[linux_argc] = linux_argp;
>> +		linux_argp[len] = 0;
>> +		linux_argc++;
>> +	} else {
>> +		linux_argp[len] = ' ';
>> +		linux_argp[len + 1] = 0;
>> +		linux_argc = 2;
>> +	}
>>  	linux_argp += len + 1;
>> -	linux_argc++;
>>  }
>>  
>>  static void linux_cmdline_dump(void)
>> @@ -73,12 +89,10 @@ static void linux_cmdline_dump(void)
>>  		debug("   arg %03d: %s\n", i, linux_argv[i]);
>>  }
>>  
>> -static void linux_cmdline_legacy(bootm_headers_t *images)
>> +static void linux_cmdline_legacy(bootm_headers_t *images, int vcoreiii)
>>  {
>>  	const char *bootargs, *next, *quote;
>> -
>> -	linux_cmdline_init();
>> -
>> +	linux_cmdline_init(vcoreiii);
>>  	bootargs = env_get("bootargs");
>>  	if (!bootargs)
>>  		return;
>> @@ -104,7 +118,7 @@ static void linux_cmdline_legacy(bootm_headers_t *images)
>>  		if (!next)
>>  			next = bootargs + strlen(bootargs);
>>  
>> -		linux_cmdline_set(bootargs, next - bootargs);
>> +		linux_cmdline_set(bootargs, next - bootargs, vcoreiii);
>>  
>>  		if (*next)
>>  			next++;
>> @@ -113,7 +127,7 @@ static void linux_cmdline_legacy(bootm_headers_t *images)
>>  	}
>>  }
>>  
>> -static void linux_cmdline_append(bootm_headers_t *images)
>> +static void linux_cmdline_append(bootm_headers_t *images, int vcoreiii)
>>  {
>>  	char buf[24];
>>  	ulong mem, rd_start, rd_size;
>> @@ -121,7 +135,7 @@ static void linux_cmdline_append(bootm_headers_t *images)
>>  	/* append mem */
>>  	mem = gd->ram_size >> 20;
>>  	sprintf(buf, "mem=%luM", mem);
>> -	linux_cmdline_set(buf, strlen(buf));
>> +	linux_cmdline_set(buf, strlen(buf), vcoreiii);
>>  
>>  	/* append rd_start and rd_size */
>>  	rd_start = images->initrd_start;
>> @@ -129,9 +143,13 @@ static void linux_cmdline_append(bootm_headers_t *images)
>>  
>>  	if (rd_size) {
>>  		sprintf(buf, "rd_start=0x%08lX", rd_start);
>> -		linux_cmdline_set(buf, strlen(buf));
>> +		linux_cmdline_set(buf, strlen(buf), vcoreiii);
>>  		sprintf(buf, "rd_size=0x%lX", rd_size);
>> -		linux_cmdline_set(buf, strlen(buf));
>> +		linux_cmdline_set(buf, strlen(buf), vcoreiii);
>> +		if (vcoreiii) {
>> +			sprintf(buf, "root=/dev/ram0");
>> +			linux_cmdline_set(buf, strlen(buf), vcoreiii);
>> +		}
>>  	}
>>  }
>>  
>> @@ -276,11 +294,15 @@ static void boot_prep_linux(bootm_headers_t *images)
>>  		boot_reloc_fdt(images);
>>  		boot_setup_fdt(images);
>>  	} else {
>> -		if (CONFIG_IS_ENABLED(MIPS_BOOT_CMDLINE_LEGACY)) {
>> -			linux_cmdline_legacy(images);
>> +		if (CONFIG_IS_ENABLED(SOC_VCOREIII)) {
>> +			linux_cmdline_legacy(images, 1);
>> +			linux_cmdline_append(images, 1);
>> +			linux_cmdline_dump();
>> +		} else if (CONFIG_IS_ENABLED(MIPS_BOOT_CMDLINE_LEGACY)) {
>> +			linux_cmdline_legacy(images, 0);
>>  
>>  			if (!CONFIG_IS_ENABLED(MIPS_BOOT_ENV_LEGACY))
>> -				linux_cmdline_append(images);
>> +				linux_cmdline_append(images, 0);
>>  
>>  			linux_cmdline_dump();
>>  		}
>> 
>
> -- 
> - Daniel
>

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

  reply	other threads:[~2018-10-09 11:28 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-25 13:01 [U-Boot] [PATCH 0/6] Add support for VCore III SoCs found in Microsemi switches Gregory CLEMENT
2018-09-25 13:01 ` [U-Boot] [PATCH 1/6] MIPS: move create_tlb() in an proper header: mipsregs.h Gregory CLEMENT
2018-09-25 13:01 ` [U-Boot] [PATCH 3/6] MSCC: add board support for the VCoreIII based evaluation boards Gregory CLEMENT
2018-09-26 19:28   ` Daniel Schwierzeck
2018-10-09 11:22     ` Gregory CLEMENT
2018-09-26 23:03   ` Marek Vasut
2018-10-09 11:23     ` Gregory CLEMENT
2018-09-25 13:01 ` [U-Boot] [PATCH 4/6] MSCC: add device tree for Ocelot and Luton (boards and SoCs) Gregory CLEMENT
2018-09-26 19:31   ` Daniel Schwierzeck
2018-10-09 11:23     ` Gregory CLEMENT
2018-09-25 13:01 ` [U-Boot] [PATCH 5/6] MSCC: add configuration for Ocelot and Luton based boards Gregory CLEMENT
2018-09-26 19:31   ` Daniel Schwierzeck
2018-10-09 11:24     ` Gregory CLEMENT
2018-09-25 13:01 ` [U-Boot] [PATCH 6/6] MIPS: bootm: Add support for Vcore III linux kernel Gregory CLEMENT
2018-09-26 19:40   ` Daniel Schwierzeck
2018-10-09 11:28     ` Gregory CLEMENT [this message]
2018-09-25 15:22 ` [U-Boot] [PATCH 0/6] Add support for VCore III SoCs found in Microsemi switches Gregory CLEMENT
2018-09-25 15:25 ` [U-Boot] [PATCH 2/6] MSCC: add support for VCoreIII SoCs Gregory CLEMENT
     [not found] ` <20180925130108.19211-3-gregory.clement@bootlin.com>
2018-09-26 19:25   ` Daniel Schwierzeck
2018-09-27 10:14     ` Gregory CLEMENT
2018-09-27 11:57       ` Alexandre Belloni
2018-10-09 11:20     ` Gregory CLEMENT

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