From: Sam Edwards <cfsworks@gmail.com>
To: Andre Przywara <andre.przywara@arm.com>
Cc: u-boot@lists.denx.de, Jagan Teki <jagan@amarulasolutions.com>,
Marek Vasut <marex@denx.de>,
Maksim Kiselev <bigunclemax@gmail.com>
Subject: Re: [PATCH 1/3] usb: musb-new: sunxi: do not attempt to access NULL SRAMC
Date: Wed, 7 Jun 2023 17:29:26 -0600 [thread overview]
Message-ID: <8848c22c-e83f-a465-b45e-909c57f7c787@gmail.com> (raw)
In-Reply-To: <20230607114505.1eac894d@donnerap.cambridge.arm.com>
Hey Andre,
On 6/7/23 04:45, Andre Przywara wrote:
> "syscon" really just means "a bunch of gates where AW didn't know where
> else to put them".
The good ol' "kitchen sink" register block, eh? Its lack of clear,
definite purpose is even reflected in the name, because when you think
about it, isn't *every* MMIO register for "system control"? :)
> Yeah, it seems this way, though nobody knows for sure ;-) I believe this
> is code that came from the original Allwinner BSP, which tends to do,
> well, weird stuff at times ;-)
I've gone ahead and submitted a patch for rewording this in the driver
source anyway. In the commit message, I've included a way we could
verify this experimentally, though I don't have access to an early
Allwinner SoC with which to try it.
> Yeah, so there are three steps, in increasing order of complexity:
> 1) Change SUNXI_SRAMC_BASE to 0x3000000. That's done already in my tree.
I've done it over here as well.
> 2) Introduce some has_sram property in U-Boot's MUSB driver and only poke
> the SRAM D bit for those SoCs that need it.
Done, a patch for that has been sent in.
> 3) Follow the allwinner,sram phandle in the MUSB driver and fish out the
> syscon base address from the DTB, to avoid hardcoding it, at least for the
> MUSB driver. We need it elsewhere, to access the version register and
> print the SoC name.
One of the patches I just sent in also adds a "TODO" comment to do this.
I also kept the function separate specifically so someone coming along
later wanting to add this has plenty of breathing room to do so.
> Can you confirm that just changing the SUNXI_SRAMC_BASE to 0x3000000 avoids
> the crash you saw, and removes the immediate need for this very patch here?
Yes: I reverted enough changes to make the crash reappear, and then
changed the base register. Updating SUNXI_SRAM_BASE to 0x03000000
resolves the crash with no side effects: it seems (BIT(0) of) 0x03000004
is RAZ/WI.
> And if I get this right, you already have 2) implemented? I would love to
> see it on the list, then.
See Patchwork series #358672.
Thanks for your continued efforts,
Sam
next prev parent reply other threads:[~2023-06-07 23:29 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-02 21:49 [PATCH 0/3] Allwinner sunxi USB gadget improvements Sam Edwards
2023-06-02 21:49 ` [PATCH 1/3] usb: musb-new: sunxi: do not attempt to access NULL SRAMC Sam Edwards
2023-06-05 10:00 ` Marek Vasut
2023-06-05 11:04 ` Andre Przywara
2023-06-07 5:39 ` Sam Edwards
2023-06-07 10:45 ` Andre Przywara
2023-06-07 23:29 ` Sam Edwards [this message]
2023-06-02 21:49 ` [PATCH 2/3] usb: musb-new: sunxi: fix error check Sam Edwards
2023-06-05 10:01 ` Marek Vasut
2023-06-02 21:49 ` [PATCH 3/3] usb: musb-new: sunxi: make compatible with UDC/DM gadget model Sam Edwards
2023-06-05 10:02 ` Marek Vasut
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