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From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH 08/11] riscv: Add K210 sysctl support
Date: Tue, 31 Dec 2019 17:49:34 -0500	[thread overview]
Message-ID: <884cb713-7f29-35cb-c550-b2264ac04e13@gmail.com> (raw)
In-Reply-To: <29dd818b-dff7-a44d-1e6c-493726d68f93@gmail.com>

This driver does nothing but load its children for the moment. Should it be
using regmap? I'm not sure how that fits into everything.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---
 arch/riscv/Kconfig                   | 11 +++++++
 arch/riscv/Makefile                  |  6 ++++
 arch/riscv/include/asm/k210_sysctl.h | 43 ++++++++++++++++++++++++++++
 arch/riscv/lib/Makefile              |  1 +
 arch/riscv/lib/k210_sysctl.c         | 22 ++++++++++++++
 arch/riscv/mach-k210/Makefile        |  1 +
 board/sipeed/maix/Kconfig            |  2 ++
 configs/sipeed_maix_bitm_config      |  1 +
 8 files changed, 87 insertions(+)
 create mode 100644 arch/riscv/include/asm/k210_sysctl.h
 create mode 100644 arch/riscv/lib/k210_sysctl.c
 create mode 100644 arch/riscv/mach-k210/Makefile

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 62c9616220..13518b0440 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -196,6 +196,14 @@ config RISCV_RDTIME
 	  standard rdtime instruction. This is the case for S-mode U-Boot, and
 	  is useful for processors that support rdtime in M-mode too.

+config K210_SYSCTL
+	bool
+	select SYSCON
+	select SPL_SYSCON if SPL
+	help
+	  The K210 sysctl block holds memory-mapped control and status
+	  registers associated with clocks, resets, power, and dma handshakes.
+
 config SYS_MALLOC_F_LEN
 	default 0x1000

@@ -237,4 +245,7 @@ config STACK_SIZE_SHIFT
 config SPL_LDSCRIPT
 	default "arch/riscv/cpu/u-boot-spl.lds"

+config ARCH_K210
+	bool "Support Kendryte K210 SOCs"
+
 endmenu
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 0b80eb8d86..390178e149 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -30,6 +30,12 @@ ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \
 PLATFORM_CPPFLAGS	+= $(ARCH_FLAGS)
 CFLAGS_EFI		+= $(ARCH_FLAGS)

+machine-$(CONFIG_ARCH_K210) += k210
+
+machdirs := $(patsubst %,arch/riscv/mach-%/,$(machine-y))
+PLATFORM_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
+libs-y += $(machdirs)
+
 head-y := arch/riscv/cpu/start.o

 libs-y += arch/riscv/cpu/
diff --git a/arch/riscv/include/asm/k210_sysctl.h b/arch/riscv/include/asm/k210_sysctl.h
new file mode 100644
index 0000000000..94170f4f31
--- /dev/null
+++ b/arch/riscv/include/asm/k210_sysctl.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com>
+ */
+
+#ifndef K210_SYSCTL_H
+#define K210_SYSCTL_H
+
+#include <linux/compiler.h>
+
+/*
+ * sysctl registers
+ * Taken from kendryte-standalone-sdk/lib/drivers/include/sysctl.h
+ */
+struct k210_sysctl {
+	u32 git_id;
+	u32 clk_freq;
+	u32 pll0;
+	u32 pll1;
+	u32 pll2;
+	u32 resv5;
+	u32 pll_lock;
+	u32 rom_error;
+	u32 clk_sel[2];
+	u32 clk_en_cent;
+	u32 clk_en_peri;
+	u32 soft_reset;
+	u32 peri_reset;
+	u32 clk_thr[7];
+	u32 misc;
+	u32 peri;
+	u32 spi_sleep;
+	u32 reset_status;
+	u32 dma_sel0;
+	u32 dma_sel1;
+	u32 power_sel;
+	u32 resv28;
+	u32 resv29;
+	u32 resv30;
+	u32 resv31;
+} __packed;
+
+#endif /* K210_SYSCTL_H */
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index c9179a5ff8..4c31e824d9 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -14,6 +14,7 @@ ifeq ($(CONFIG_$(SPL_)RISCV_MMODE),y)
 obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o
 obj-$(CONFIG_ANDES_PLIC) += andes_plic.o
 obj-$(CONFIG_ANDES_PLMT) += andes_plmt.o
+obj-$(CONFIG_K210_SYSCTL) += k210_sysctl.o
 else
 obj-$(CONFIG_RISCV_RDTIME) += rdtime.o
 obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
diff --git a/arch/riscv/lib/k210_sysctl.c b/arch/riscv/lib/k210_sysctl.c
new file mode 100644
index 0000000000..f0b66aa36a
--- /dev/null
+++ b/arch/riscv/lib/k210_sysctl.c
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com>
+ */
+#include <asm/k210_sysctl.h>
+
+#include <dm.h>
+
+static const struct udevice_id k210_sysctl_ids[] = {
+	{ .compatible = "kendryte,k210-sysctl", },
+	{ }
+};
+
+U_BOOT_DRIVER(k210_sysctl) = {
+	.name = "k210_sysctl",
+	.id = UCLASS_SYSCON,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
+	.of_match = k210_sysctl_ids,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/arch/riscv/mach-k210/Makefile b/arch/riscv/mach-k210/Makefile
new file mode 100644
index 0000000000..6defe5ccb2
--- /dev/null
+++ b/arch/riscv/mach-k210/Makefile
@@ -0,0 +1 @@
+obj-y := sysctl.o
diff --git a/board/sipeed/maix/Kconfig b/board/sipeed/maix/Kconfig
index ec9acd61ca..257135b2cb 100644
--- a/board/sipeed/maix/Kconfig
+++ b/board/sipeed/maix/Kconfig
@@ -34,7 +34,9 @@ config BOARD_SPECIFIC_OPTIONS
 	select SIFIVE_SERIAL
 	select ARCH_DEFAULT_RV64I
 	select ENV_IS_NOWHERE
+	select ARCH_K210
 	imply SIFIVE_CLINT
+	imply K210_SYSCTL
 	imply SPI
 	imply DM_GPIO
 	imply CMD_GPIO
diff --git a/configs/sipeed_maix_bitm_config b/configs/sipeed_maix_bitm_config
index 70bb566cb1..bb2d2e7932 100644
--- a/configs/sipeed_maix_bitm_config
+++ b/configs/sipeed_maix_bitm_config
@@ -28,6 +28,7 @@ CONFIG_RISCV_MMODE=y
 CONFIG_RISCV_ISA_C=y
 CONFIG_RISCV_ISA_A=y
 CONFIG_SIFIVE_CLINT=y
+CONFIG_K210_SYSCTL=y
 CONFIG_SHOW_REGS=y
 CONFIG_STACK_SIZE_SHIFT=14
 CONFIG_ARCH_K210=y
-- 
2.24.1

  parent reply	other threads:[~2019-12-31 22:49 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-31 22:39 [PATCH 00/11] riscv: Add Sipeed Maix support Sean Anderson
2019-12-31 22:42 ` [PATCH 01/11] clk: Always use the supplied struct clk Sean Anderson
2020-01-02  5:01   ` Jagan Teki
2019-12-31 22:43 ` [PATCH 02/11] clk: Check that ops of composite clock components exist, before calling Sean Anderson
2019-12-31 22:44 ` [PATCH 03/11] riscv: Add headers for asm/global_data.h Sean Anderson
2019-12-31 22:45 ` [PATCH 04/11] riscv: Add an option to default to RV64I Sean Anderson
2019-12-31 22:46 ` [PATCH 05/11] riscv: Enable SiFive UART support pre-relocation Sean Anderson
2019-12-31 22:47 ` [PATCH 06/11] riscv: Add initial Sipeed Maix support Sean Anderson
2019-12-31 22:48 ` [PATCH 07/11] riscv: Add device tree for K210 Sean Anderson
2019-12-31 22:49 ` Sean Anderson [this message]
2019-12-31 22:50 ` [PATCH 09/11] riscv: Add K210 pll support Sean Anderson
2019-12-31 22:50 ` [PATCH 10/11] riscv: Add K210 clock support Sean Anderson
2019-12-31 22:51 ` [PATCH 11/11] riscv: Add option to disable writes to mcounteren Sean Anderson

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