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Tue, 12 May 2026 16:42:08 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS09N1.mediatek.inc (172.21.101.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Tue, 12 May 2026 16:42:07 +0800 Received: from mcddlt001.gcn.mediatek.inc (10.19.240.15) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Tue, 12 May 2026 16:42:06 +0800 Message-ID: <8a6b7ad4d3ede9c6b27e8aba57ee7c8ca06f6947.camel@mediatek.com> Subject: Re: [PATCH v2 3/7] mtd: spi-nor-ids: Add support for GigaDevice GD25Q256 From: Weijie Gao To: , CC: , , , , , , , , , , , Date: Tue, 12 May 2026 16:42:05 +0800 In-Reply-To: References: <6558b4e914d6de3353af2728016b17e3736d4a6d.1777368885.git.weijie.gao@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Tue, 2026-05-12 at 06:16 +0000, Takahiro.Kuwano@infineon.com wrote: > External email : Please do not click links or open attachments until > you have verified the sender or the content. > > > Hi, > > > This flash is tested on MediaTek's filogic platform. > > > > The datasheet can be found here: > > https://urldefense.com/v3/__https://download.gigadevice.com/Datasheet/DS-00526-GD25Q256E-Rev1.3.pdf__;!!CTRNKA9wMg0ARbw!ndOq50YXbkGmB3qYwwC_omlvMBrrpmnEYWM7HgPAAAr8lFPMtkm7ZnS3buDbxXZZ_N35sCX5t3lWH9rSvvUY69OHWTYcwkw$ > > Please add a quick introduction/description about the device in > commit > message and use Link: tag for datasheet reference. > > > > > Signed-off-by: Weijie Gao > > --- > > v2: updated commit message > > --- > > drivers/mtd/spi/spi-nor-ids.c | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi- > > nor-ids.c > > index fcc546fb5ae..8b74fbd4946 100644 > > --- a/drivers/mtd/spi/spi-nor-ids.c > > +++ b/drivers/mtd/spi/spi-nor-ids.c > > @@ -147,6 +147,11 @@ const struct flash_info spi_nor_ids[] = { > > SECT_4K | SPI_NOR_DUAL_READ | > > SPI_NOR_QUAD_READ | > > SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) > > }, > > + { > > + INFO("gd25q256", 0xc84019, 0, 64 * 1024, 512, > > + SECT_4K | SPI_NOR_DUAL_READ | > > SPI_NOR_QUAD_READ | > > + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) > > Did you test locking feature? > Per datasheet, this device has 4-bit BPs and TB at SR BIT(6), while > current > u-boot supports 3-bit BPs and TB at SR BIT(5) only. This is a copy-paste mistake. I'll remove these two flags. > > > + }, > > /* adding these 3V QSPI flash parts */ > > {INFO("gd25b256", 0xc84019, 0, 64 * 1024, 512, SECT_4K | > > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | > > SPI_NOR_4B_OPCODES) }, > > -- > > 2.45.2 > > Thanks, > Takahiro >