From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD880C433FE for ; Thu, 20 Jan 2022 13:45:41 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 901CE8386B; Thu, 20 Jan 2022 14:45:39 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1642686339; bh=UVas52Syj8ODrKmTnJQZP2i7R8vf+cmh81H9WfBxXas=; h=Date:Subject:To:Cc:References:From:In-Reply-To:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=aPursV4xLE9xJexvaLLLYxj5MA+gRUXbjaob/+BVqb+VweAN3tNRxYGlITPwYopnh HlXFoD+KyBA/f68EoZMfQnsr3iYCHj9hDNA6dy8i1hSgFHR1zQ/XfSFmedJBzjEDnA Z0spdEfd0vjFCyKriN6EGWKpnzMMI4RnBam71wz4UC3BjjkCiavRUlh75akxKgSF48 XJPGm25BH4FjaWPl0S4W6oRu/W6RcC8/ZOPVHbGTmQuglbqR7aJX9YbXRkZQiKlBwH Ys12keXEtxZgZNQyXqvY5VxwqLTfFydnUqHhel4HN13U0+6zYXxoJSZvxIrEk314zk U47oKshWa6DtQ== Received: by phobos.denx.de (Postfix, from userid 109) id 9F0FF83888; Thu, 20 Jan 2022 14:45:38 +0100 (CET) Received: from mout-u-204.mailbox.org (mout-u-204.mailbox.org [IPv6:2001:67c:2050:1::465:204]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 031B783852 for ; Thu, 20 Jan 2022 14:45:36 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp2.mailbox.org (unknown [91.198.250.124]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-204.mailbox.org (Postfix) with ESMTPS id 4JfkKq2sJPzQlMj; Thu, 20 Jan 2022 14:45:35 +0100 (CET) Message-ID: <956c758d-e8f4-1da8-e706-e457d235d60b@denx.de> Date: Thu, 20 Jan 2022 14:45:30 +0100 MIME-Version: 1.0 Subject: Re: [PATCH 1/1] drivers: octeon: get rid of Unicode in code Content-Language: en-US To: Heinrich Schuchardt , Tom Rini Cc: u-boot@lists.denx.de References: <20220116221158.6894-1-heinrich.schuchardt@canonical.com> From: Stefan Roese In-Reply-To: <20220116221158.6894-1-heinrich.schuchardt@canonical.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On 1/16/22 23:11, Heinrich Schuchardt wrote: > Placing Unicode control codes in the middle of a comment > does not make much sense. Let's get rid of all Unicode in > drivers/ram/octeon/octeon3_lmc.c. > > Signed-off-by: Heinrich Schuchardt Reviewed-by: Stefan Roese Thanks, Stefan > --- > drivers/ram/octeon/octeon3_lmc.c | 34 ++++++++++++++++---------------- > 1 file changed, 17 insertions(+), 17 deletions(-) > > diff --git a/drivers/ram/octeon/octeon3_lmc.c b/drivers/ram/octeon/octeon3_lmc.c > index 349abc179f..eaef0fa5c1 100644 > --- a/drivers/ram/octeon/octeon3_lmc.c > +++ b/drivers/ram/octeon/octeon3_lmc.c > @@ -2050,7 +2050,7 @@ static int compute_vref_val(struct ddr_priv *priv, int if_num, int rankx, > lmc_control.u64 = lmc_rd(priv, CVMX_LMCX_CONTROL(if_num)); > > /* > - * New computed vref = existing computed vref – X > + * New computed vref = existing computed vref - X > * > * The value of X is depending on different conditions. > * Both #122 and #139 are 2Rx4 RDIMM, while #124 is stacked > @@ -2058,7 +2058,7 @@ static int compute_vref_val(struct ddr_priv *priv, int if_num, int rankx, > * > * 1. Stacked Die: 2Rx4 > * 1-slot: offset = 7. i, e New computed vref = existing > - * computed vref – 7 > + * computed vref - 7 > * 2-slot: offset = 6 > * > * 2. Regular: 2Rx4 > @@ -9941,11 +9941,11 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p, > * NOTE: this step done in the calling routine(s)... > * 3) Setup GENERAL_PURPOSE[0-2] registers with the data pattern > * of choice. > - * a. GENERAL_PURPOSE0[DATA<63:0>] – sets the initial lower > + * a. GENERAL_PURPOSE0[DATA<63:0>] - sets the initial lower > * (rising edge) 64 bits of data. > - * b. GENERAL_PURPOSE1[DATA<63:0>] – sets the initial upper > + * b. GENERAL_PURPOSE1[DATA<63:0>] - sets the initial upper > * (falling edge) 64 bits of data. > - * c. GENERAL_PURPOSE2[DATA<15:0>] – sets the initial lower > + * c. GENERAL_PURPOSE2[DATA<15:0>] - sets the initial lower > * (rising edge <7:0>) and upper (falling edge <15:8>) ECC data. > */ > > @@ -9980,8 +9980,8 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p, > > /* > * 7) Set PHY_CTL[PHY_RESET] = 1 (LMC automatically clears this as > - * it’s a one-shot operation). This is to get into the habit of > - * resetting PHY’s SILO to the original 0 location. > + * it's a one-shot operation). This is to get into the habit of > + * resetting PHY's SILO to the original 0 location. > */ > phy_ctl.u64 = lmc_rd(priv, CVMX_LMCX_PHY_CTL(if_num)); > phy_ctl.s.phy_reset = 1; > @@ -10013,9 +10013,9 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p, > * a. COL, ROW, BA, BG, PRANK points to the starting point > * of the address. > * You can just set them to all 0. > - * b. RW_TRAIN – set this to 1. > - * c. TCCD_L – set this to 0. > - * d. READ_CMD_COUNT – instruct the sequence to the how many > + * b. RW_TRAIN - set this to 1. > + * c. TCCD_L - set this to 0. > + * d. READ_CMD_COUNT - instruct the sequence to the how many > * writes/reads. > * It is 5 bits field, so set to 31 of maximum # of r/w. > */ > @@ -10063,9 +10063,9 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p, > > /* > * 6) Read MPR_DATA0 and MPR_DATA1 for results. > - * a. MPR_DATA0[MPR_DATA<63:0>] – comparison results > + * a. MPR_DATA0[MPR_DATA<63:0>] - comparison results > * for DQ63:DQ0. (1 means MATCH, 0 means FAIL). > - * b. MPR_DATA1[MPR_DATA<7:0>] – comparison results > + * b. MPR_DATA1[MPR_DATA<7:0>] - comparison results > * for ECC bit7:0. > */ > mpr_data0 = lmc_rd(priv, CVMX_LMCX_MPR_DATA0(if_num)); > @@ -10073,8 +10073,8 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p, > > /* > * 7) Set PHY_CTL[PHY_RESET] = 1 (LMC automatically > - * clears this as it’s a one-shot operation). > - * This is to get into the habit of resetting PHY’s > + * clears this as it's a one-shot operation). > + * This is to get into the habit of resetting PHY's > * SILO to the original 0 location. > */ > phy_ctl.u64 = lmc_rd(priv, CVMX_LMCX_PHY_CTL(if_num)); > @@ -10163,11 +10163,11 @@ static void setup_hw_pattern(struct ddr_priv *priv, int lmc, > /* > * 3) Setup GENERAL_PURPOSE[0-2] registers with the data pattern > * of choice. > - * a. GENERAL_PURPOSE0[DATA<63:0>] – sets the initial lower > + * a. GENERAL_PURPOSE0[DATA<63:0>] - sets the initial lower > * (rising edge) 64 bits of data. > - * b. GENERAL_PURPOSE1[DATA<63:0>] – sets the initial upper > + * b. GENERAL_PURPOSE1[DATA<63:0>] - sets the initial upper > * (falling edge) 64 bits of data. > - * c. GENERAL_PURPOSE2[DATA<15:0>] – sets the initial lower > + * c. GENERAL_PURPOSE2[DATA<15:0>] - sets the initial lower > * (rising edge <7:0>) and upper > * (falling edge <15:8>) ECC data. > */ > Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de