From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A723CC761A6 for ; Thu, 30 Mar 2023 17:43:58 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 10B4285DD5; Thu, 30 Mar 2023 19:43:56 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="KG3rhWJk"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id D745985DCD; Thu, 30 Mar 2023 19:43:54 +0200 (CEST) Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8AFE485F1C for ; Thu, 30 Mar 2023 19:43:49 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=gadiyar@ti.com Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32UHhll1112950; Thu, 30 Mar 2023 12:43:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680198227; bh=/+WM6O/FxOEbBqHXJbl0AAUrfkKBaLtta8QuxNxouKc=; h=From:To:CC:Subject:Date:References:In-Reply-To; b=KG3rhWJkMxM3V/EfFgB3IuQPlV0ZHU5HjCAs96DWdaj5Q8CMTmARnsGzSHCb3Ubow sWtXQPZJ510cqB1Al63EY1GyJi9IRl1JUdXcVBoM19PYWdXz3mUHxIDpC75Eh6iRxI 5k9A8NwEwoHek9gqN72VT0kz89wzhYhJG5Z0kA0I= Received: from DFLE101.ent.ti.com (dfle101.ent.ti.com [10.64.6.22]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32UHhlVb113551 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 30 Mar 2023 12:43:47 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Thu, 30 Mar 2023 12:43:47 -0500 Received: from DFLE111.ent.ti.com ([fe80::6c89:b1ca:ee8f:1a6f]) by DFLE111.ent.ti.com ([fe80::6c89:b1ca:ee8f:1a6f%17]) with mapi id 15.01.2507.016; Thu, 30 Mar 2023 12:43:47 -0500 From: "Gadiyar, Anand" To: "Achath, Vaishnav" , "u-boot@lists.denx.de" , "trini@konsulko.com" CC: "Raghavendra, Vignesh" , "Menon, Nishanth" , "Kumar, Udit" Subject: RE: [PATCH 0/2] arm: dts: J721E Hyperbus Fixes Thread-Topic: [PATCH 0/2] arm: dts: J721E Hyperbus Fixes Thread-Index: AQHZYy6qNHG36YaZ2UK2WafuUKkdB68Tl0pA Date: Thu, 30 Mar 2023 17:43:47 +0000 Message-ID: <9d858d65db784c0cbb3ef76237fc287d@ti.com> References: <20230330174005.24950-1-vaishnav.a@ti.com> In-Reply-To: <20230330174005.24950-1-vaishnav.a@ti.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.247.19.115] x-exclaimer-md-config: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean > From: Achath, Vaishnav >=20 > J721E SoC has a hyperbus controller and OSPI controller muxed and only > one of the controllers should be active at a time >=20 > While enabling support for hyperflash in J721E, the hyperbus controller > was enabled by default in SoC DTS and was kept disabled in board DTS. > For J721E SK, the board level DTS does not disable the hyperbus node > which causes OSPI and Hyperbus controllers to be active at the same time > thus causing boot failure on J721E SK, to avoid situations like this keep > the hyperbus controller disabled by default in SoC DTS. Also the fixups f= or > hyperflash enable according to DIP switch settings on EVM is relevant onl= y > to J721E EVM and J7200 EVM, thus disable those fixups for other platforms= . >=20 > Since the hyperbus node is not present in kernel DTS, manual update is > needed to fix the issue( J721E SK Boot failure). J721E SK boot failure > needs additional fixes on the board DTS which will be sent separately, > but hyperbus and OSPI controller being active was also one of the issues > causing boot failure. >=20 > Changes were tested on J721E EVM and J721E SK for basic boot and hyperfla= sh > functionality(EVM). >=20 > Vaishnav Achath (2): > arm: dts: k3-j721e-mcu-wakeup: Disable hyperbus controller node > board: ti: j721e: Disable hyperflash fixup for J721E SK >=20 > arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 1 + > board/ti/j721e/evm.c | 6 ++++++ > 2 files changed, 7 insertions(+) >=20 For what it's worth, these were independently tested by me on both J721e EV= M and SK boards off the v2023.04-rc5 tag. An additional patchset is needed for the SK board to boot - it seems to hav= e been broken since at least March 2022, if not earlier. I'll send that out s= hortly. Tested-by: Anand Gadiyar