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From: Anshul Dalal <anshuld@ti.com>
To: Ilias Apalodimas <ilias.apalodimas@linaro.org>, <u-boot@lists.denx.de>
Cc: <vigneshr@ti.com>, <trini@konsulko.com>, <nm@ti.com>,
	<robertcnelson@gmail.com>, <w.egorov@phytec.de>,
	<francesco.dolcini@toradex.com>, <ggiordano@phytec.com>,
	<m-chawdhry@ti.com>, <a-nandan@ti.com>, <afd@ti.com>, <bb@ti.com>,
	<u-kumar1@ti.com>, <devarsht@ti.com>
Subject: Re: [PATCH v5 3/4] mach-k3: add dynamic mmu fixups for SPL stage
Date: Thu, 14 Aug 2025 20:21:04 +0530	[thread overview]
Message-ID: <DC28GWHJ2HQM.2OO7QTNTJ2UMT@ti.com> (raw)
In-Reply-To: <DB63G6T323QW.2AQUT656TKCGJ@linaro.org>

Hello Ilias,

On Tue Jul 8, 2025 at 1:39 AM IST, Ilias Apalodimas wrote:
> Hi Anshul,
>
> On Thu Jul 3, 2025 at 4:35 PM EEST, Anshul Dalal wrote:
>> On platforms with spl splash support such as 62p and 62x
>> (CONFIG_VIDEO=y), the top of DDR is reserved for the framebuffer.
>>
>> The size of the framebuffer is computed at runtime by video_reserve.
>> During the MMU configuration an entry corresponding to the framebuffer
>> should be dynamically created to properly allocate the required space
>> for the framebuffer.
>>
>> Therefore this patch adds k3_spl_mem_map_init which adds the required
>> MMU entry by querying the gd after the framebuffer size has been
>> computed in spl_reserve_video_from_ram_top.
>>
>> Signed-off-by: Anshul Dalal <anshuld@ti.com>
>> ---
>>  arch/arm/mach-k3/arm64/arm64-mmu.c | 13 ++++++++++++-
>>  arch/arm/mach-k3/common.c          | 17 ++++++++++++++---
>>  2 files changed, 26 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/mach-k3/arm64/arm64-mmu.c b/arch/arm/mach-k3/arm64/arm64-mmu.c
>> index 49dd6fcb23b..b1b287f2114 100644
>> --- a/arch/arm/mach-k3/arm64/arm64-mmu.c
>> +++ b/arch/arm/mach-k3/arm64/arm64-mmu.c
>> @@ -131,6 +131,13 @@ static int k3_setup_extra_mem_banks(unsigned int *map_idx)
>>  	return 0;
>>  }
>>
>> +static void k3_spl_mem_map_init(unsigned int *map_idx)
>> +{
>> +	if (CONFIG_IS_ENABLED(VIDEO))
>> +		k3_mmu_add_cachable_entry(gd_video_bottom(), gd_video_top(),
>> +					  map_idx);
>> +}
>> +
>
> I don't know wnough details for this board, but generally speaking we should be doing
> this commonly for all arm64 platforms. There's mmu code for that. Can you explain why
> this is only useful to k3?
>

Could you point me to the relevant mmu code for it, from what I know
U-Boot doesn't map the framebuffer region at SPL stage by itself. Though
I'll replace k3_mmu_add_cachable_entry with something like
mmu_map_region in the next revision.

Regards,
Anshul

  reply	other threads:[~2025-08-14 14:52 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-03 13:35 [PATCH v5 0/4] Add support for dynamic MMU configuration Anshul Dalal
2025-07-03 13:35 ` [PATCH v5 1/4] mach-k3: use minimal MMU table for all k3 Anshul Dalal
2025-07-03 13:35 ` [PATCH v5 2/4] mach-k3: add runtime configuration of MMU table Anshul Dalal
2025-07-07 20:15   ` Ilias Apalodimas
2025-08-14 14:11     ` Anshul Dalal
2025-08-21  6:20       ` Ilias Apalodimas
2025-07-03 13:35 ` [PATCH v5 3/4] mach-k3: add dynamic mmu fixups for SPL stage Anshul Dalal
2025-07-07 20:09   ` Ilias Apalodimas
2025-08-14 14:51     ` Anshul Dalal [this message]
2025-08-21  6:17       ` Ilias Apalodimas
2025-07-03 13:35 ` [PATCH v5 4/4] board: add call to k3_mem_map_init for all k3 boards Anshul Dalal

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