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Wed, 29 Oct 2025 03:58:29 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE214.ent.ti.com (10.64.6.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Wed, 29 Oct 2025 03:58:29 -0500 Received: from localhost (dhcp-172-24-233-105.dhcp.ti.com [172.24.233.105]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 59T8wSpS3769773; Wed, 29 Oct 2025 03:58:29 -0500 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Date: Wed, 29 Oct 2025 14:28:27 +0530 Message-ID: Subject: Re: [REGRESSION] Re: [PATCH v11 00/11] Add support for dynamic MMU configuration From: Anshul Dalal To: Emanuele Ghidoli , Anshul Dalal , Francesco Dolcini , , Emanuele Ghidoli CC: , , , , , , , , , , , , , , , X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20251017131540.3636067-1-anshuld@ti.com> <20251027165225.GA71553@francesco-nb> <7401dee0-7ac6-4280-a934-0881dfbb1b6c@gmail.com> In-Reply-To: <7401dee0-7ac6-4280-a934-0881dfbb1b6c@gmail.com> X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017090:EE_|CY5PR10MB6216:EE_ X-MS-Office365-Filtering-Correlation-Id: bdc5bd93-c90b-4afc-323e-08de16c9566c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:flwvzet201.ext.ti.com; PTR:ErrorRetry; CAT:NONE; SFS:(13230040)(376014)(7416014)(82310400026)(1800799024)(36860700013)(34020700016)(12100799066); DIR:OUT; SFP:1501; X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Oct 2025 08:58:32.6508 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bdc5bd93-c90b-4afc-323e-08de16c9566c X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7; Ip=[198.47.21.195]; Helo=[flwvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017090.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR10MB6216 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Tue Oct 28, 2025 at 10:26 PM IST, Emanuele Ghidoli wrote: > On 28/10/2025 05:38, Anshul Dalal wrote: >> Hi Francesco, >>=20 >> On Mon Oct 27, 2025 at 10:22 PM IST, Francesco Dolcini wrote: >>> Hello Anshul, >>> >>> On Fri, Oct 17, 2025 at 06:45:22PM +0530, Anshul Dalal wrote: >>>> Hi all, >>>> >>>> In U-Boot, TI only provides a single memory map for all k3 platforms, = this >>>> does not scale for devices where atf and optee lie outside the range 0= x80000000 >>>> - 0x80080000 and 0x9e780000 - 0xa0000000 respectively. >>>> >>>> There are also issues for devices with < 2GiB of memory (eg am62SiP wi= th 512MiB >>>> of RAM) as the maximum size for the first DRAM bank is hardcoded to 2G= iB in the >>>> current memory map. Furthermore the second DRAM bank is mapped even fo= r devices >>>> that only have a single bank. >>>> >>>> Therefore this patch set adds the required functionality to create the= MMU table >>>> at runtime based on the device-tree. >>>> >>>> The patch set has been build tested on all effected platforms but boot= -tested >>>> only on TI's K3 EVMs, the beagleplay and phytec's phycore-am6* platfor= ms. >>>> >>>> The following effected boards have not been boot tested: >>>> - verdin-am62 >>> >>> it seems that this series introduce a regression on verdin-am62, I have >>> not done a bi-sect yet, but we run daily build of U-Boot master and the >>> regressions seems to have started when this patch series was >>> merged. >>> >>> On verdin-am62 we detect the RAM size at run-time, see >>> board/toradex/verdin-am62/verdin-am62.c:dram_init(), and now we always >>> get 2GiB even for modules with only 512MB or 1024MB of memory. >>> >>=20 >> This patch series modified the behavior of enable_caches to configure th= e >> memory map of the device as per the device-tree instead of using a >> static map for all of K3. >>=20 >> The issue with verdin-am62 seems to be that while you do properly >> configure gd->ram_size in your dram_init, the '/memory' node of the >> device-tree remains unchanged with the outdated 2GiB size. >>=20 >> You could try updating the fdt's memory size to the correct value in >> dram_init and see if that fixes the problem. >>=20 >> Regards, >> Anshul > Hello Anshul, > > I was bisecting the series, and I can confirm that the commit "mach-k3: m= ap > all banks using mem_map_from_dram_banks" introduces the regression. > > Given that initcall_run_f() calls dram_init_banksize(), and after relocat= ion > board_init_r() calls enable_caches() (call stack: board_init_r() -> > initcall_run_r() -> initr_caches() -> enable_caches()), I would expect th= at > enable_caches() should not override the bank sizes previously configured. > Currently, however, enable_caches() introduces this side effect. > > Wouldn=E2=80=99t it make more sense to call fdtdec_setup_memory_banksize(= ) in the > default dram_init_banksize() (in arch/arm/mach-k3/k3-ddr.c) and avoid cal= ling > it again in mem_map_from_dram_banks()? > We could follow that order too but that would makes a call to mem_map_from_dram_banks dependent on gd->bd->di_dram being correctly populated. I had assumed whoever calls mem_map_from_dram_banks had made sure to properly fixup the memory node of the fdt. Given that it seems like the root cause of the problem is with the U-Boot's device-tree not having the correct memory node, we could add a call to fixup_memory_node (arch/arm/mach-k3/k3-ddr.c) from A53 SPL to ensure the memory can be queried stright from the device-tree once we do get to U-Boot proper. --- a/board/toradex/verdin-am62/verdin-am62.c +++ b/board/toradex/verdin-am62/verdin-am62.c @@ -46,6 +46,13 @@ int dram_init_banksize(void) return ret; } +#ifdef CONFIG_XPL_BUILD +void spl_perform_board_fiups(struct spl_image_info *spl_image) +{ + fixup_memory_node(spl_image); +} +#endif + /* * Avoid relocated U-Boot clash with Linux reserved-memory on 512 MB SoM */ If you could get to U-Boot prompt with the above diff, could you share the output of the 'meminfo' command with the following configs added: CONFIG_CMD_MEMINFO=3Dy CONFIG_CMD_MEMINFO_MAP=3Dy Though so far, I have been unsuccessful in my attempts to reproduce a boot failure on our own 512MiB platforms (AM62x SiP). Could you share the boot logs with '#define DEBUG' in common/board_r.c, common/board_f.c and mach-k3/common.c to help further narrow down the issue. Regards, Anshul