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Thu, 30 Oct 2025 10:39:29 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE202.ent.ti.com (10.64.6.60) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Thu, 30 Oct 2025 10:39:29 -0500 Received: from localhost (dhcp-172-24-233-105.dhcp.ti.com [172.24.233.105]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 59UFdSec2421607; Thu, 30 Oct 2025 10:39:28 -0500 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Date: Thu, 30 Oct 2025 21:09:27 +0530 Message-ID: From: Anshul Dalal To: Andrew Davis , Anshul Dalal CC: , , , , , , , Subject: Re: [PATCH v9 4/8] mach-k3: common: support only MMC in R5 falcon mode X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20251030051937.3659010-1-anshuld@ti.com> <20251030051937.3659010-5-anshuld@ti.com> <6fe53b09-fe92-4d04-8e51-9084f2b01c77@ti.com> In-Reply-To: <6fe53b09-fe92-4d04-8e51-9084f2b01c77@ti.com> X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A3:EE_|IA4PR10MB8541:EE_ X-MS-Office365-Filtering-Correlation-Id: a64e3df1-0fb5-4f9f-24ba-08de17ca87a8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:flwvzet201.ext.ti.com; PTR:ErrorRetry; CAT:NONE; SFS:(13230040)(82310400026)(376014)(34020700016)(1800799024)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Oct 2025 15:39:35.9421 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a64e3df1-0fb5-4f9f-24ba-08de17ca87a8 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7; Ip=[198.47.21.195]; Helo=[flwvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A3.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA4PR10MB8541 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Thu Oct 30, 2025 at 7:25 PM IST, Andrew Davis wrote: > On 10/30/25 12:19 AM, Anshul Dalal wrote: >> To simplify the boot process and prevent the R5 SPL size from growing, >> this patch restricts the boot media to load the next stage payload >> (tifalcon.bin and kernel FIT) from MMC only. >>=20 > > Is R5 SPL size the only reason? This seems rather restrictive to only > support one boot mode with all this.. For most non MMC FS boot modes, the raw offsets that U-Boot uses are common in the non-falcon and falcon mode. And since we need both the boot flows to first load tifalcon.bin and then fitImage, we can't make use of the common spl boot flow with those boot media. For MMC FS however we have two separate configs namely SPL_FS_LOAD_PAYLOAD_NAME and SPL_FS_LOAD_KERNEL_NAME for each. This also simplifies the usage where the tiboot3.bin as the intial stage bootloader can be loaded from any boot media with the catch being that tifalcon.bin and fitImage both are loaded from MMC FS. Specifically the boot directory in rootfs, which simplifies the yocto recipes as well. > >> Signed-off-by: Anshul Dalal --- >> arch/arm/mach-k3/am62ax/am62a7_init.c | 3 +++ >> arch/arm/mach-k3/am62px/am62p5_init.c | 4 ++++ >> arch/arm/mach-k3/am62x/am625_init.c | 3 +++ >> arch/arm/mach-k3/common.h | 1 + >> arch/arm/mach-k3/r5/common.c | 17 ++++++++++++++++- 5 files >> changed, 27 insertions(+), 1 deletion(-) >>=20 >> diff --git a/arch/arm/mach-k3/am62ax/am62a7_init.c >> b/arch/arm/mach-k3/am62ax/am62a7_init.c index >> 48d578e7d6f..1c8a5fd2a35 100644 --- >> a/arch/arm/mach-k3/am62ax/am62a7_init.c +++ >> b/arch/arm/mach-k3/am62ax/am62a7_init.c @@ -240,5 +240,8 @@ u32 >> spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) >> =20 >> u32 spl_boot_device(void) { +#if >> IS_ENABLED(CONFIG_SPL_OS_BOOT_SECURE) && !IS_ENABLED(CONFIG_ARM64) > > The check for CONFIG_ARM64 might not be needed, what if we want to > falcon boot from A53 SPL right into Linux? I have a separate series[1] adding support for A53 falcon mode and we can use all falcon supported boot media from the A53 SPL there so an k3_r5_falcon_bootmode equivalent is not necessary. [1]: https://lore.kernel.org/u-boot/20251024081408.1610102-1-anshuld@ti.com= / > >> + return k3_r5_falcon_bootmode(); +#endif > > This should be an #else capturing the below return call, otherwise > think about what the function looks like after the preprocessor step > if the above is true: > > u32 spl_boot_device(void) { return k3_r5_falcon_bootmode(); return > get_boot_device(); } > > just seems odd. > Will fix in the next revision, Thanks! Regards, Anshul > Andrew > >> return get_boot_device(); } diff --git >> a/arch/arm/mach-k3/am62px/am62p5_init.c >> b/arch/arm/mach-k3/am62px/am62p5_init.c index >> aebd5200b0d..4c215d5cebe 100644 --- >> a/arch/arm/mach-k3/am62px/am62p5_init.c +++ >> b/arch/arm/mach-k3/am62px/am62p5_init.c @@ -375,6 +375,10 @@ u32 >> spl_boot_device(void) u32 devstat =3D readl(CTRLMMR_MAIN_DEVSTAT); >> u32 bootmedia; >> =20 >> +#if IS_ENABLED(CONFIG_SPL_OS_BOOT_SECURE) && >> !IS_ENABLED(CONFIG_ARM64) + return k3_r5_falcon_bootmode(); +#endif >> + if (bootindex =3D=3D K3_PRIMARY_BOOTMODE) bootmedia =3D >> __get_primary_bootmedia(devstat); else diff --git >> a/arch/arm/mach-k3/am62x/am625_init.c >> b/arch/arm/mach-k3/am62x/am625_init.c index 14f93ac998f..44b8d2654b2 >> 100644 --- a/arch/arm/mach-k3/am62x/am625_init.c +++ >> b/arch/arm/mach-k3/am62x/am625_init.c @@ -327,5 +327,8 @@ u32 >> spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) >> =20 >> u32 spl_boot_device(void) { +#if >> IS_ENABLED(CONFIG_SPL_OS_BOOT_SECURE) && !IS_ENABLED(CONFIG_ARM64) >> + return k3_r5_falcon_bootmode(); +#endif return >> get_boot_device(); } diff --git a/arch/arm/mach-k3/common.h >> b/arch/arm/mach-k3/common.h index 5807d358464..cd3e19374dc 100644 >> --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ >> -54,6 +54,7 @@ int shutdown_mcu_r5_core1(void); >> =20 >> #if IS_ENABLED(CONFIG_SPL_OS_BOOT_SECURE) && >> !IS_ENABLED(CONFIG_ARM64) int k3_r5_falcon_bootmode(void); +int >> k3_r5_falcon_prep(void); #endif >> =20 >> #if (IS_ENABLED(CONFIG_K3_QOS)) diff --git >> a/arch/arm/mach-k3/r5/common.c b/arch/arm/mach-k3/r5/common.c index >> 439dd92ef54..aa94c0c1956 100644 --- a/arch/arm/mach-k3/r5/common.c >> +++ b/arch/arm/mach-k3/r5/common.c @@ -391,6 +391,21 @@ int >> spl_start_uboot(void) return 0; } >> =20 >> +int k3_r5_falcon_bootmode(void) +{ + char *mmcdev =3D >> env_get("mmcdev"); + + if (!mmcdev) + return >> BOOT_DEVICE_NOBOOT; + + if (strncmp(mmcdev, "0", sizeof("0")) =3D=3D >> 0) + return BOOT_DEVICE_MMC1; + else if (strncmp(mmcdev, >> "1", sizeof("1")) =3D=3D 0) + return BOOT_DEVICE_MMC2; + else >> + return BOOT_DEVICE_NOBOOT; +} + int >> k3_r5_falcon_prep(void) { struct spl_image_loader *loader, *drv; @@ >> -402,7 +417,7 @@ int k3_r5_falcon_prep(void) memset(&kernel_image, >> '\0', sizeof(kernel_image)); drv =3D ll_entry_start(struct >> spl_image_loader, spl_image_loader); n_ents =3D ll_entry_count(struct >> spl_image_loader, spl_image_loader); - bootdev.boot_device =3D >> spl_boot_device(); + bootdev.boot_device =3D k3_r5_falcon_bootmode(); >> =20 >> for (loader =3D drv; loader !=3D drv + n_ents; loader++) { if >> (bootdev.boot_device !=3D loader->boot_device)