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Ip=[198.47.23.195]; Helo=[lewvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099DD.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR10MB6051 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Fri Mar 20, 2026 at 10:26 AM CDT, Robert Nelson wrote: >> > + >> > +config POCKETBEAGLE2_AM62X_RAM_SIZE_FIX >> > + bool "Set the PocketBeagle 2 RAM size instead of detecting it" >> > + default false >> > + help >> > + RAM size is automatically detected through the device revision= stored >> > + in EEPROM. This overrides the detection logic with a fixed val= ue. >> >> With the ability to detect the board type via the EEPROM, is there any >> use to having this option? >> >> IMO we should just let the board boot with runtime detection for DDR >> size everytime. This config option just makes the execution harder to >> understand while providing minimal value. > > Phytec also does that with their boards that detect memory sizes, i > think Randolph was trying to mirror that kconfig section.. Yeah, I specifically like the option to override the detection logic if use= rs have unusual hardware configs or boards that do not follow the loose identification scheme defined in the automatic fixup path. >> >> > + >> > +choice >> > + prompt "PocketBeagle 2 RAM size" >> > + depends on POCKETBEAGLE2_AM62X_RAM_SIZE_FIX >> > + default POCKETBEAGLE2_AM62X_RAM_SIZE_512MB >> > + >> > +config POCKETBEAGLE2_AM62X_RAM_SIZE_512MB >> > + bool "512MB RAM" >> > + help >> > + Set RAM size fix to 512MB for the PocketBeagle 2. >> > + >> > +config POCKETBEAGLE2_AM62X_RAM_SIZE_1GB >> > + bool "1GB RAM" >> > + help >> > + Set RAM size fix to 1GB for the PocketBeagle 2. >> > + >> > +endchoice >> > diff --git a/board/beagle/pocketbeagle2/Makefile b/board/beagle/pocket= beagle2/Makefile >> > index 3d42c160716..dd529fe6d75 100644 >> > --- a/board/beagle/pocketbeagle2/Makefile >> > +++ b/board/beagle/pocketbeagle2/Makefile >> > @@ -7,3 +7,5 @@ >> > # >> > >> > obj-y +=3D pocketbeagle2.o >> > +obj-${CONFIG_K3_DDRSS} +=3D ../../phytec/common/k3/k3_ddrss_patch.o >> > +obj-${CONFIG_TI_I2C_BOARD_DETECT} +=3D ../../ti/common/board_detect.o >> > diff --git a/board/beagle/pocketbeagle2/pocketbeagle2.c b/board/beagle= /pocketbeagle2/pocketbeagle2.c >> > index b6768caa34b..1bfc79350b6 100644 >> > --- a/board/beagle/pocketbeagle2/pocketbeagle2.c >> > +++ b/board/beagle/pocketbeagle2/pocketbeagle2.c >> > @@ -15,15 +15,123 @@ >> > #include >> > #include >> > >> > +#include "../../ti/common/board_detect.h" >> > +#include "pocketbeagle2_ddr.h" >> > + >> > +DECLARE_GLOBAL_DATA_PTR; >> > + >> > +static int pocketbeagle2_get_ddr_size(void) >> > +{ >> > + // check config overrides first >> > + if (IS_ENABLED(CONFIG_POCKETBEAGLE2_AM62X_RAM_SIZE_FIX)) { >> > + if (IS_ENABLED(CONFIG_POCKETBEAGLE2_AM62X_RAM_SIZE_512MB= )) >> > + return EEPROM_RAM_SIZE_512MB; >> > + if (IS_ENABLED(CONFIG_POCKETBEAGLE2_AM62X_RAM_SIZE_1GB)) >> > + return EEPROM_RAM_SIZE_1GB; >> > + } >> > + >> > +#if IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT) >> > + // dynamically detect the config if we can >> > + if (!do_board_detect_am6()) { >> > + struct ti_am6_eeprom *ep =3D TI_AM6_EEPROM_DATA; >> > + >> > + if (strlen(ep->name) > 11 && ep->name[0] =3D=3D 'P') { >> > + /* >> > + * POCKETBEAGL2A00 (am6232 512MB) >> > + * POCKETBEAGL2A10 (am625 512MB) >> > + * POCKETBEAGL2A1I (am625 1GB) >> > + */ >> > + if (!strncmp(&ep->name[11], "2A1I", 4)) >> > + return EEPROM_RAM_SIZE_1GB; >> > + } >> > + } >> > +#endif >> > + >> > + return EEPROM_RAM_SIZE_512MB; >> > +} >> > + >> > int dram_init(void) >> > { >> > - return fdtdec_setup_mem_size_base(); >> > + if (!IS_ENABLED(CONFIG_CPU_V7R)) >> >> I don't have a 1GiB pb2 to test with but I'm assuming the fixed up >> memory nodes get passed from the R5 SPL to A53 SPL and then finally to >> U-Boot as part of fixup_memory_node from k3-ddr.c. > > @Andrei Aldea ^ can you help ;) > Andrei has agreed to give me a board tomorrow so I don't have to test this = all through a proxy. >> Could somebody confirm if this is indeed the correct flow? I wanted to >> see if both A53 SPL and U-Boot receive the correct memory size as part >> of their DT. > > Sadly while developing this, the DT memory values were not passed > between the R5 SPL and the A53 SPL ( and thus A53 main ).. > > After thinking about this routine since I came up with it last month, > it might be better to do 2 device-tree's... So with 512MB default > path, for 1GB, patch ddr timing in R5/SPL and force 1GB device tree. > Then A53/SPL (and main) would have the correct memory size.. > > Currently, we read the eeprom 3 times, R5 SPL, A53 SPL and A53 main.. > (but we only need it really twice, R5 SPL (ddr patch) and the A53 main > (device-tree values patching..) > > >> >> > + return fdtdec_setup_mem_size_base(); >> > + >> > + return 0; >> > } >> > >> > +// logic after this block assumes that there is only 1 DRAM bank curr= ently >> > +#if CONFIG_NR_DRAM_BANKS !=3D 1 >> > +#error Unsupported number of DRAM banks! >> > +#endif >> > + >> > int dram_init_banksize(void) >> > { >> > - return fdtdec_setup_memory_banksize(); >> > + u8 ram_size; >> > + >> > + if (!IS_ENABLED(CONFIG_CPU_V7R)) >> > + return fdtdec_setup_memory_banksize(); >> > + >> > + memset(gd->bd->bi_dram, 0, sizeof(gd->bd->bi_dram[0])); >> > + >> > + ram_size =3D pocketbeagle2_get_ddr_size(); >> > + switch (ram_size) { >> > + case EEPROM_RAM_SIZE_1GB: >> > + gd->bd->bi_dram[0].start =3D CFG_SYS_SDRAM_BASE; >> > + gd->bd->bi_dram[0].size =3D 0x40000000; >> > + gd->ram_size =3D 0x40000000; >> > + break; >> > + case EEPROM_RAM_SIZE_512MB: >> > + default: >> > + gd->bd->bi_dram[0].start =3D CFG_SYS_SDRAM_BASE; >> > + gd->bd->bi_dram[0].size =3D 0x20000000; >> > + gd->ram_size =3D 0x20000000; >> >> We can make use of SZ_512M and SZ_1G macros here. >> >> > + break; >> > + } >> > + >> > + return 0; >> > +} >> > + >> > +#if IS_ENABLED(CONFIG_K3_DDRSS) >> > +static int update_ddrss_timings(void) >> > +{ >> > + int ret =3D 0; >> > + u8 ram_size =3D 0; >> >> Having a u8 of "ram_size" is confusing, we should make it explict that >> it's an index into pocketbeagle2_ddrss_data. I assume you just want some explicit typedef for this then? Or was your com= ment more about the naming? >> > + struct ddrss *ddr_patch =3D NULL; >> > + void *fdt =3D (void *)gd->fdt_blob; >> > + >> > + ram_size =3D pocketbeagle2_get_ddr_size(); >> > + ddr_patch =3D &pocketbeagle2_ddrss_data[ram_size]; >> > + >> > + if (!ddr_patch) >> > + return ret; >> > + >> > + ret =3D fdt_apply_ddrss_timings_patch(fdt, ddr_patch); >> > + if (ret) { >> > + printf("Failed to apply ddrs timings patch: %d\n", ret); >> > + return ret; >> > + } >> > + >> > + return ret; >> > +} >> > + >> > +int do_board_detect(void) >> > +{ >> > + void *fdt =3D (void *)gd->fdt_blob; >> > + u64 start[] =3D {gd->bd->bi_dram[0].start}; >> > + u64 size[] =3D {gd->bd->bi_dram[0].size}; >> > + int ret; >> > + >> >> Nit: formatting (done with clang-format) >> >> - u64 start[] =3D {gd->bd->bi_dram[0].start}; >> - u64 size[] =3D {gd->bd->bi_dram[0].size}; >> + u64 start[] =3D { gd->bd->bi_dram[0].start }; >> + u64 size[] =3D { gd->bd->bi_dram[0].size }; >> ... >> - snprintf(fdtfile, sizeof(fdtfile), "%s.dtb", CONFIG_DEFA= ULT_DEVICE_TREE); >> + snprintf(fdtfile, sizeof(fdtfile), "%s.dtb", >> + CONFIG_DEFAULT_DEVICE_TREE); >> >> >> > + dram_init(); >> > + dram_init_banksize(); >> > + >> > + ret =3D fdt_fixup_memory_banks(fdt, start, size, 1); >> > + if (ret) { >> > + printf("Failed to fixup memory banks: %d\n", ret); >> > + return ret; >> > + } >> > + >> > + return update_ddrss_timings(); >> > } >> > +#endif /* CONFIG_K3_DDRSS */ >> > >> > #if IS_ENABLED(CONFIG_BOARD_LATE_INIT) >> > int board_late_init(void) >> > diff --git a/board/beagle/pocketbeagle2/pocketbeagle2_ddr.h b/board/be= agle/pocketbeagle2/pocketbeagle2_ddr.h >> > new file mode 100644 >> > index 00000000000..6d248ce6dfa >> > --- /dev/null >> > +++ b/board/beagle/pocketbeagle2/pocketbeagle2_ddr.h >> > @@ -0,0 +1,50 @@ >> > +/* SPDX-License-Identifier: GPL-2.0+ */ >> > +/* >> > + * DDR override logic for AM625 PocketBeagle 2 >> > + * https://www.beagleboard.org/boards/pocketbeagle-2 >> > + * >> > + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti= .com/ >> > + */ >> > + >> > +#ifndef __POCKETBEAGLE2_DDR_H >> > +#define __POCKETBEAGLE2_DDR_H >> > + >> > +#include "../../phytec/common/k3/k3_ddrss_patch.h" >> > + >> > +enum { >> > + EEPROM_RAM_SIZE_512MB =3D 0, >> > + EEPROM_RAM_SIZE_1GB =3D 1 >> > +}; >> > + >> > +struct ddr_reg ddr_1gb_ctl_regs[] =3D { >> > + { 317, 0x00000101 }, >> > + { 318, 0x1FFF0000 }, >> > +}; >> > + >> > +struct ddr_reg ddr_1gb_pi_regs[] =3D { >> > + { 77, 0x04010100 }, >> > +}; >> > + >> > +struct ddrss pocketbeagle2_ddrss_data[] =3D { >> > + // default configuration >> > + [EEPROM_RAM_SIZE_512MB] =3D { >> > + .ctl_regs =3D NULL, >> > + .ctl_regs_num =3D 0, >> > + .pi_regs =3D NULL, >> > + .pi_regs_num =3D 0, >> > + .phy_regs =3D NULL, >> > + .phy_regs_num =3D 0, >> > + }, >> > + >> > + // industrial configuration >> > + [EEPROM_RAM_SIZE_1GB] =3D { >> > + .ctl_regs =3D &ddr_1gb_ctl_regs[0], >> > + .ctl_regs_num =3D ARRAY_SIZE(ddr_1gb_ctl_regs), >> > + .pi_regs =3D &ddr_1gb_pi_regs[0], >> > + .pi_regs_num =3D ARRAY_SIZE(ddr_1gb_pi_regs), >> > + .phy_regs =3D NULL, >> > + .phy_regs_num =3D 0, >> > + }, >> > +}; >> > + >> > +#endif /* __POCKETBEAGLE2_DDR_H */ >> > diff --git a/configs/am62_pocketbeagle2_r5_defconfig b/configs/am62_po= cketbeagle2_r5_defconfig >> > index e863204cfef..d72f78b932c 100644 >> > --- a/configs/am62_pocketbeagle2_r5_defconfig >> > +++ b/configs/am62_pocketbeagle2_r5_defconfig >> > @@ -14,7 +14,7 @@ CONFIG_DM_GPIO=3Dy >> > CONFIG_SPL_DM_SPI=3Dy >> > CONFIG_DEFAULT_DEVICE_TREE=3D"k3-am62-r5-pocketbeagle2" >> > CONFIG_DM_RESET=3Dy >> > -CONFIG_SPL_SYS_MALLOC_F_LEN=3D0x7000 >> > +CONFIG_SPL_SYS_MALLOC_F_LEN=3D0x8000 >> > CONFIG_SPL_MMC=3Dy >> > CONFIG_SPL_SERIAL=3Dy >> > CONFIG_SPL_DRIVERS_MISC=3Dy >> > @@ -42,6 +42,7 @@ CONFIG_SPL_SYS_MALLOC=3Dy >> > CONFIG_SPL_EARLY_BSS=3Dy >> > CONFIG_SPL_SYS_MMCSD_RAW_MODE=3Dy >> > CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=3D0x400 >> > +CONFIG_SPL_I2C=3Dy >> > CONFIG_SPL_DM_MAILBOX=3Dy >> > CONFIG_SPL_DM_RESET=3Dy >> > CONFIG_SPL_POWER_DOMAIN=3Dy >> > @@ -73,6 +74,8 @@ CONFIG_SPL_CLK_K3_PLL=3Dy >> > CONFIG_SPL_CLK_K3=3Dy >> > CONFIG_TI_SCI_PROTOCOL=3Dy >> > CONFIG_DA8XX_GPIO=3Dy >> > +CONFIG_DM_I2C=3Dy >> > +CONFIG_SYS_I2C_OMAP24XX=3Dy >> > CONFIG_DM_MAILBOX=3Dy >> > CONFIG_K3_SEC_PROXY=3Dy >> > CONFIG_SPL_MISC=3Dy >>