From: Anshul Dalal <anshuld@ti.com>
To: Anshul Dalal <anshuld@ti.com>, <u-boot@lists.denx.de>
Cc: Tom Rini <trini@konsulko.com>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>,
Dhruva Gole <d-gole@ti.com>, Mark Kettenis <kettenis@openbsd.org>,
Patrice Chotard <patrice.chotard@foss.st.com>,
"Moteen Shah" <m-shah@ti.com>, Beleswar Padhi <b-padhi@ti.com>,
Wadim Egorov <w.egorov@phytec.de>,
Chintan Vankar <c-vankar@ti.com>, Suhaas Joshi <s-joshi@ti.com>
Subject: Re: [PATCH master] mach-k3: enable mmu after reserved memory is unmapped
Date: Wed, 13 May 2026 10:21:39 +0530 [thread overview]
Message-ID: <DIHA24WPD5RR.375NLCSWPLE4E@ti.com> (raw)
In-Reply-To: <20260512-am62_firewall_exception_fix-v1-1-4b274718bdac@ti.com>
On Tue May 12, 2026 at 4:33 PM IST, Anshul Dalal wrote:
> Currently the sequence to enable caches for the A53/A72 core on K3
> devices looks as follows:
>
> 1. Map entire DDR banks
> 2. Setup page tables and enable MMU (done by mmu_setup)
> 3. Unmap reserved-memory regions
> 4. Enable caches
>
> However there is a brief period of execution between #2 and #3 where the
> core can issue speculative accesses to the entire DDR space (including
> the reserved-memory regions) despite the caches being disabled.
>
> A firewall exception is triggered whenever such speculative access is
> made to secure DDR region of TFA or OP-TEE. This patch fixes the issue
> by re-ordering the sequence as follows:
>
> 1. Map entire DDR banks
> 2. Setup page tables
> 3. Unmap reserved-memory regions
> 4. Enable MMU
> 5. Enable caches
>
> Fixes: f1c694b8fdde ("mach-k3: map all banks using mem_map_from_dram_banks")
> Signed-off-by: Anshul Dalal <anshuld@ti.com>
Forgot to add:
Reported-by: Suhaas Joshi <s-joshi@ti.com>
--
Anshul Dalal <anshuld@ti.com>
prev parent reply other threads:[~2026-05-13 4:51 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 11:03 [PATCH master] mach-k3: enable mmu after reserved memory is unmapped Anshul Dalal
2026-05-13 4:51 ` Anshul Dalal [this message]
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