From mboxrd@z Thu Jan  1 00:00:00 1970
From: Albert ARIBAUD <albert.u.boot@aribaud.net>
Date: Fri, 4 Jul 2014 19:50:08 +0200
Subject: [U-Boot] [Patch v9 1/5] Added 64-bit MMIO accessors for ARMv8
In-Reply-To: <1403561756-12238-1-git-send-email-yorksun@freescale.com>
References: <1403561756-12238-1-git-send-email-yorksun@freescale.com>
Message-ID: <E1X37cf-0000vL-Gv@janus>
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To: u-boot@lists.denx.de

Hi York,

On Mon, 23 Jun 2014 15:15:52 -0700, York Sun <yorksun@freescale.com>
wrote:

> From: "J. German Rivera" <German.Rivera@freescale.com>
> 
> This is needed for accessing peripherals with 64-bit MMIO registers,
> from ARMv8 processors.
> 
> Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
> ---
> Change log
>  v9: no change
>  v8: no change
>  v7: no change
>  v6: no change
>  v5: no change
>  v4: no change
>  v3: no change
> 
>  arch/arm/include/asm/io.h |    8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
> index 6a1f05a..95528dd 100644
> --- a/arch/arm/include/asm/io.h
> +++ b/arch/arm/include/asm/io.h
> @@ -70,10 +70,12 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
>  #define __arch_getb(a)			(*(volatile unsigned char *)(a))
>  #define __arch_getw(a)			(*(volatile unsigned short *)(a))
>  #define __arch_getl(a)			(*(volatile unsigned int *)(a))
> +#define __arch_getq(a)			(*(volatile unsigned long long *)(a))
>  
>  #define __arch_putb(v,a)		(*(volatile unsigned char *)(a) = (v))
>  #define __arch_putw(v,a)		(*(volatile unsigned short *)(a) = (v))
>  #define __arch_putl(v,a)		(*(volatile unsigned int *)(a) = (v))
> +#define __arch_putq(v,a)		(*(volatile unsigned long long *)(a) = (v))
>  
>  extern inline void __raw_writesb(unsigned long addr, const void *data,
>  				 int bytelen)
> @@ -123,10 +125,12 @@ extern inline void __raw_readsl(unsigned long addr, void *data, int longlen)
>  #define __raw_writeb(v,a)	__arch_putb(v,a)
>  #define __raw_writew(v,a)	__arch_putw(v,a)
>  #define __raw_writel(v,a)	__arch_putl(v,a)
> +#define __raw_writeq(v,a)	__arch_putq(v,a)
>  
>  #define __raw_readb(a)		__arch_getb(a)
>  #define __raw_readw(a)		__arch_getw(a)
>  #define __raw_readl(a)		__arch_getl(a)
> +#define __raw_readq(a)		__arch_getq(a)
>  
>  /*
>   * TODO: The kernel offers some more advanced versions of barriers, it might
> @@ -139,10 +143,12 @@ extern inline void __raw_readsl(unsigned long addr, void *data, int longlen)
>  #define writeb(v,c)	({ u8  __v = v; __iowmb(); __arch_putb(__v,c); __v; })
>  #define writew(v,c)	({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; })
>  #define writel(v,c)	({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
> +#define writeq(v,c)	({ u64 __v = v; __iowmb(); __arch_putq(__v,c); __v; })
>  
>  #define readb(c)	({ u8  __v = __arch_getb(c); __iormb(); __v; })
>  #define readw(c)	({ u16 __v = __arch_getw(c); __iormb(); __v; })
>  #define readl(c)	({ u32 __v = __arch_getl(c); __iormb(); __v; })
> +#define readq(c)	({ u64 __v = __arch_getq(c); __iormb(); __v; })
>  
>  /*
>   * The compiler seems to be incapable of optimising constants
> @@ -168,9 +174,11 @@ extern inline void __raw_readsl(unsigned long addr, void *data, int longlen)
>  #define out_arch(type,endian,a,v)	__raw_write##type(cpu_to_##endian(v),a)
>  #define in_arch(type,endian,a)		endian##_to_cpu(__raw_read##type(a))
>  
> +#define out_le64(a,v)	out_arch(q,le64,a,v)
>  #define out_le32(a,v)	out_arch(l,le32,a,v)
>  #define out_le16(a,v)	out_arch(w,le16,a,v)
>  
> +#define in_le64(a)	in_arch(q,le64,a)
>  #define in_le32(a)	in_arch(l,le32,a)
>  #define in_le16(a)	in_arch(w,le16,a)
>  

Series applied to u-boot-arm/master (with a slight manual fix to
boards.cfg in 1/5), thanks!

Amicalement,
-- 
Albert.