From mboxrd@z Thu Jan 1 00:00:00 1970 From: Albert ARIBAUD Date: Fri, 4 Jul 2014 23:47:48 +0200 Subject: [U-Boot] [PATCH v2] gpio: spear_gpio: Fix gpio_set_value() implementation In-Reply-To: <1379291741.13052.1.camel@phoenix> References: <1379291741.13052.1.camel@phoenix> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Axel, On Mon, 16 Sep 2013 08:35:41 +0800, Axel Lin wrote: > In current gpio_set_value() implementation, it always sets the gpio control bit > no matter the value argument is 0 or 1. Thus the GPIOs never set to low. > This patch fixes this bug. > > The address bus is used as a mask on read/write operations, so that independent > software drivers can set their GPIO bits without affecting any other pins in a > single write operation. Thus we don't need a read-modify-write to update the > register. > > Signed-off-by: Axel Lin > Acked-by: Stefan Roese > Reviewed-by: Vipin Kumar > Reviewed-by: Michael Trimarchi > --- > v2: Update commit log to explain why a read-modify-write is not necessary > for clearing specific GPIO bit. > Also added Michael Trimarchi's reviewed-by tag since he does review the > patch and said the patch is fine. > > drivers/gpio/spear_gpio.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c > index 367b670..6fb4117 100644 > --- a/drivers/gpio/spear_gpio.c > +++ b/drivers/gpio/spear_gpio.c > @@ -36,7 +36,10 @@ int gpio_set_value(unsigned gpio, int value) > { > struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE; > > - writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]); > + if (value) > + writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]); > + else > + writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]); > > return 0; > } Applied to u-boot-arm/master, thanks! Amicalement, -- Albert.