From mboxrd@z Thu Jan  1 00:00:00 1970
From: Albert ARIBAUD <albert.u.boot@aribaud.net>
Date: Thu, 18 Sep 2014 11:18:00 +0200
Subject: [U-Boot] [PATCH 8/8] ARMv8: PSCI: Enable SMC
In-Reply-To: <1409171401-22616-9-git-send-email-arnab.basu@freescale.com>
References: <1409171401-22616-1-git-send-email-arnab.basu@freescale.com>
	<1409171401-22616-9-git-send-email-arnab.basu@freescale.com>
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To: u-boot@lists.denx.de

Hi Arnab,

On Thu, 28 Aug 2014 02:00:01 +0530, Arnab Basu
<arnab.basu@freescale.com> wrote:

> Enable the SMC instruction so that the kernel can use the psci code
> 
> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
> Reviewed-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  arch/arm/include/asm/macro.h |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
> index 0009c28..94a1e68 100644
> --- a/arch/arm/include/asm/macro.h
> +++ b/arch/arm/include/asm/macro.h
> @@ -106,7 +106,11 @@ lr	.req	x30
>  .endm
>  
>  .macro armv8_switch_to_el2_m, xreg1
> +#ifdef CONFIG_ARMV8_PSCI
> +	mov	\xreg1, #0x531	/* Non-secure EL0/EL1 | HVC | 64bit EL2 */
> +#else
>  	mov	\xreg1, #0x5b1	/* Non-secure EL0/EL1 | HVC | 64bit EL2 */

The 'mov' lines have different constant arguments in the instruction;
their explanatory comments should not be the same.

> +#endif
>  	msr	scr_el3, \xreg1
>  	msr	cptr_el3, xzr	/* Disable coprocessor traps to EL3 */
>  	mov	\xreg1, #0x33ff


Amicalement,
-- 
Albert.