From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 14213C43217 for ; Wed, 19 Oct 2022 16:20:45 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4E26D84F84; Wed, 19 Oct 2022 18:20:43 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="UpR7Emhd"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 23C5784F84; Wed, 19 Oct 2022 18:20:41 +0200 (CEST) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6013B84D85 for ; Wed, 19 Oct 2022 18:20:38 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=conor@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8991B61844; Wed, 19 Oct 2022 16:20:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C6585C433D6; Wed, 19 Oct 2022 16:20:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1666196436; bh=CJY/q8L44TggCYWO14odbRQ4PkGjlO8fL9QfjdKzljw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=UpR7EmhdoKfr+71or+xqWKv69NZxGHaFXGnpyQIsZ93aI76N3+zIt2BFUPj4FLklR yswOZy0JkmjAlAbb4LFeodYpeDW/PxJ9SSsyGmCUwrzwetkStLpotPdK8NfkSm4RGC Y2Pbx27EcmMl+suIA0qhiuwP2Mxu9+Uihbn/+8b8nLejwlxdHIPPpWogC/AcXWzMvZ fRdGOVN7fxMCp2FMigi0/IFLUT/zaIUWUKnJ7eaFp9y8u6h1FhWdlaG7LFi9LNDBW+ QXVWeIo6qUgZyoG9CoH3e5MV16qXBiVeYVVxzdJdU6vOzxwRBkszSatYrhIgOfMHcg CUGFTMkY9ckFA== Date: Wed, 19 Oct 2022 17:20:30 +0100 From: Conor Dooley To: Padmarao Begari Cc: u-boot@lists.denx.de, jagan@amarulasolutions.com, rick@andestech.com, ycliang@andestech.com, bmeng.cn@gmail.com, cyril.jean@microchip.com, conor.dooley@microchip.com, valentina.fernandezalanis@microchip.com, nagasuresh.relli@microchip.com Subject: Re: [PATCH 4/4] spi: Add Microchip PolarFire SoC QSPI driver Message-ID: References: <20221019145322.2274420-1-padmarao.begari@microchip.com> <20221019145322.2274420-5-padmarao.begari@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221019145322.2274420-5-padmarao.begari@microchip.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Wed, Oct 19, 2022 at 08:23:22PM +0530, Padmarao Begari wrote: > Add QSPI driver code for the Microchip PolarFire SoC. > This driver supports the qspi standard, dual and quad > mode interfaces. > > Signed-off-by: Padmarao Begari > Signed-off-by: Naga Sureshkumar Relli > --- > drivers/spi/Kconfig | 6 + > drivers/spi/Makefile | 1 + > drivers/spi/microchip_qspi.c | 504 +++++++++++++++++++++++++++++++++++ > 3 files changed, 511 insertions(+) > create mode 100644 drivers/spi/microchip_qspi.c > > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig > index 2f12081f88..690306309a 100644 > --- a/drivers/spi/Kconfig > +++ b/drivers/spi/Kconfig > @@ -237,6 +237,12 @@ config MESON_SPIFC > This driver can be used to access the SPI NOR flash chips on > Amlogic Meson SoCs. > > +config MICROCHIP_QSPI Can this be MICROCHIP_COREQSPI to match my proposed name of the driver and the function/structure names in the driver? > diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile > + > +static const struct udevice_id mchp_coreqspi_ids[] = { > + { .compatible = "microchip,mpfs-qspi" }, Could we add microchip,coreqspi-rtl-v2 to the compatible list here please to match the linux driver? The linux driver works perfectly well with the fabric core and I assume that's the case for the the U-Boot driver too? Thanks, Conor. > + { } > +}; > + > +U_BOOT_DRIVER(mchp_coreqspi) = { > + .name = "mchp_coreqspi", > + .id = UCLASS_SPI, > + .of_match = mchp_coreqspi_ids, > + .ops = &mchp_coreqspi_ops, > + .priv_auto = sizeof(struct mchp_coreqspi), > + .probe = mchp_coreqspi_probe, > +}; > -- > 2.25.1 >