From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 904FEC433FE for ; Sat, 22 Oct 2022 11:28:06 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7F30084F5E; Sat, 22 Oct 2022 13:28:04 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="JGJq9WYy"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 14A6184FD0; Sat, 22 Oct 2022 13:28:02 +0200 (CEST) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 71F6A84F11 for ; Sat, 22 Oct 2022 13:27:59 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=conor@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AB36F60C3E; Sat, 22 Oct 2022 11:27:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1369EC433D6; Sat, 22 Oct 2022 11:27:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1666438077; bh=PZqUZOxw6nqyh2iCapMa9oOsLTQSrL4WdYsaDn2aUCU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=JGJq9WYyldlsyL7IM73Rwjq7mrlRdnfoQotpQ1CyNp+Fv9EscM+bmpKkvf6EbheJy LGXZ0RMoVXUNoDVpXMREj6Ctr8MG9jeGVsjyPvNulkSawjvc/lkal5TagUsolymVhC sHti/cPfG0H23bL9klGa4VZZP+LKNDGGNhB9iXUjwgS4kiCWeXYYefTC2OwHaHFcU+ vRMwXXueLcHhpqvEu6Qq02/WA+OhZcCgPs6h+oDOAW1vGGHQX579TYw2i1jtRo0VuH q87FtugQ4b2rkn99KAxa+BCJ8kGprgrP2iVMA/9vQy+7Z9C7gD4fuo8MUdOtttEP8/ nsxZtAzjFY51g== Date: Sat, 22 Oct 2022 12:27:52 +0100 From: Conor Dooley To: Padmarao Begari Cc: u-boot@lists.denx.de, jagan@amarulasolutions.com, rick@andestech.com, ycliang@andestech.com, bmeng.cn@gmail.com, cyril.jean@microchip.com, conor.dooley@microchip.com, valentina.fernandezalanis@microchip.com, nagasuresh.relli@microchip.com Subject: Re: [PATCH v2 2/4] riscv: dts: Add QSPI NAND device node Message-ID: References: <20221021065922.2327875-1-padmarao.begari@microchip.com> <20221021065922.2327875-3-padmarao.begari@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221021065922.2327875-3-padmarao.begari@microchip.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Fri, Oct 21, 2022 at 12:29:20PM +0530, Padmarao Begari wrote: > Add QSPI NAND device node to the Microchip PolarFire SoC > Icicle kit device tree. > > The Winbond NAND flash memory can be connected to the > Icicle Kit by using the Mikroe Flash 5 click board and > the Pi 3 Click shield. > > Signed-off-by: Padmarao Begari > --- > arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts b/arch/riscv/dts/microchip-mpfs-icicle-kit.dts > index 876c475069..e1fbedc507 100644 > --- a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts > +++ b/arch/riscv/dts/microchip-mpfs-icicle-kit.dts > @@ -18,6 +18,7 @@ > aliases { > serial1 = &uart1; > ethernet0 = &mac1; > + spi0 = &qspi; > }; > > chosen { > @@ -113,3 +114,17 @@ > ti,fifo-depth = <0x1>; > }; > }; > + > +&qspi { > + status = "okay"; > + num-cs = <1>; Convention suggests a blank line before children, right? Other than that, LGTM.. Reviewed-by: Conor Dooley > + flash0: flash@0 { > + compatible = "spi-nand"; > + reg = <0x0>; > + spi-tx-bus-width = <4>; > + spi-rx-bus-width = <4>; > + spi-max-frequency = <20000000>; > + spi-cpol; > + spi-cpha; > + }; > +}; > -- > 2.25.1 >