From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 29B01C433FE for ; Thu, 3 Nov 2022 07:04:56 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 83A1384ED3; Thu, 3 Nov 2022 08:04:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id D574F84F6E; Thu, 3 Nov 2022 08:04:53 +0100 (CET) Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3B4EE808B6 for ; Thu, 3 Nov 2022 08:04:49 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 2A374ek8055287; Thu, 3 Nov 2022 15:04:40 +0800 (+08) (envelope-from ycliang@andestech.com) Received: from ubuntu01 (10.0.12.75) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Thu, 3 Nov 2022 15:04:38 +0800 Date: Thu, 3 Nov 2022 07:04:33 +0000 From: Leo Liang To: CC: , , Subject: [PULL] u-boot-riscv/master Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline User-Agent: Mutt/2.0.5 (2021-01-21) X-Originating-IP: [10.0.12.75] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 2A374ek8055287 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Tom, The following changes since commit c8d9ff634fc429db5acf2f5386ea937f0fef1ae7: Merge branch '2022-10-31-FWU-add-FWU-multi-bank-update-feature-support' (2022-11-01 09:32:21 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 7321bad25f18684b53cff4346543fb2da2a2c0d0: riscv: Update Microchip MPFS Icicle Kit support (2022-11-03 13:27:56 +0800) CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/13999 ---------------------------------------------------------------- Padmarao Begari (4): riscv: dts: Update memory configuration riscv: dts: Add QSPI NAND device node spi: Add Microchip PolarFire SoC QSPI driver riscv: Update Microchip MPFS Icicle Kit support Yu Chien Peter Lin (1): riscv: Rename Andes PLIC to PLICSW arch/riscv/Kconfig | 6 +-- arch/riscv/cpu/ax25/Kconfig | 2 +- arch/riscv/dts/ae350-u-boot.dtsi | 2 +- arch/riscv/dts/ae350_32.dts | 6 +-- arch/riscv/dts/ae350_64.dts | 6 +-- arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 91 ++++++++++++-------------------- arch/riscv/include/asm/global_data.h | 4 +- arch/riscv/include/asm/syscon.h | 2 +- arch/riscv/lib/Makefile | 2 +- arch/riscv/lib/{andes_plic.c => andes_plicsw.c} | 26 +++++----- board/microchip/mpfs_icicle/Kconfig | 7 +++ configs/microchip_mpfs_icicle_defconfig | 1 + drivers/spi/Kconfig | 6 +++ drivers/spi/Makefile | 1 + drivers/spi/microchip_coreqspi.c | 505 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/timer/andes_plmt_timer.c | 2 +- 16 files changed, 582 insertions(+), 87 deletions(-) rename arch/riscv/lib/{andes_plic.c => andes_plicsw.c} (76%) create mode 100644 drivers/spi/microchip_coreqspi.c Best regards, Leo