From: Yu-Chien Peter Lin <peterlin@andestech.com>
To: Samuel Holland <samuel@sholland.org>
Cc: <u-boot@lists.denx.de>
Subject: Re: [PATCH v2] riscv: Fix detecting FPU support in standard extension
Date: Mon, 14 Nov 2022 08:48:18 +0000 [thread overview]
Message-ID: <Y3IA0udTcx2K6/sS@APC323> (raw)
In-Reply-To: <9377cc11-9c47-ed7e-a439-0464b792b93c@sholland.org>
On Sun, Nov 13, 2022 at 03:47:38PM -0600, Samuel Holland wrote:
> On 11/5/22 01:02, Yu Chien Peter Lin wrote:
> > We should check the string until it hits underscore, in case it
> > searches for the letters in the custom extension. For example,
> > "rv64imac_xandes" will be treated as D extension support since
> > there is a "d" in "andes", resulting illegal instruction caused
> > by initializing FCSR.
> >
> > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
> > ---
> > arch/riscv/cpu/cpu.c | 14 +++++++++++---
> > 1 file changed, 11 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> > index 52ab02519f..d34c8efce0 100644
> > --- a/arch/riscv/cpu/cpu.c
> > +++ b/arch/riscv/cpu/cpu.c
> > @@ -36,6 +36,7 @@ static inline bool supports_extension(char ext)
> > #ifdef CONFIG_CPU
> > struct udevice *dev;
> > char desc[32];
> > + int i;
> >
> > uclass_find_first_device(UCLASS_CPU, &dev);
> > if (!dev) {
> > @@ -43,9 +44,16 @@ static inline bool supports_extension(char ext)
> > return false;
> > }
> > if (!cpu_get_desc(dev, desc, sizeof(desc))) {
> > - /* skip the first 4 characters (rv32|rv64) */
> > - if (strchr(desc + 4, ext))
> > - return true;
> > + /*
> > + * skip the first 4 characters (rv32|rv64) and
> > + * check until underscore
> > + */
>
> This probably works for the intended usage, but it is not guaranteed to
> work. Underscores are allowed even between single-letter extensions. See
> section 29.5 ("Underscores") of the unprivileged spec. Still, this is an
> improvement, so:
>
> Reviewed-by: Samuel Holland <samuel@sholland.org>
Aah, I missed that case.
I supposed the strings always match the pattern stated in riscv cpus
binding [1], the detection logic here needs to be updated once the
case is also allowed.
[1] https://github.com/torvalds/linux/blob/v6.1-rc5/Documentation/devicetree/bindings/riscv/cpus.yaml#L83
Thanks for your review!
Best regards,
Peter Lin
>
> > + for (i = 4; i < sizeof(desc); i++) {
> > + if (desc[i] == '_' || desc[i] == '\0')
> > + break;
> > + if (desc[i] == ext)
> > + return true;
> > + }
> > }
> >
> > return false;
>
prev parent reply other threads:[~2022-11-14 0:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-05 6:02 [PATCH v2] riscv: Fix detecting FPU support in standard extension Yu Chien Peter Lin
[not found] ` <HK0PR03MB2994D5179CFED4510DB0DCCDC1019@HK0PR03MB2994.apcprd03.prod.outlook.com>
2022-11-10 7:45 ` Rick Chen
2022-11-10 12:30 ` Padmarao.Begari
2022-11-13 21:47 ` Samuel Holland
2022-11-14 8:48 ` Yu-Chien Peter Lin [this message]
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