* [PATCH v2] riscv: Fix detecting FPU support in standard extension
@ 2022-11-05 6:02 Yu Chien Peter Lin
[not found] ` <HK0PR03MB2994D5179CFED4510DB0DCCDC1019@HK0PR03MB2994.apcprd03.prod.outlook.com>
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Yu Chien Peter Lin @ 2022-11-05 6:02 UTC (permalink / raw)
To: u-boot; +Cc: samuel, Yu Chien Peter Lin
We should check the string until it hits underscore, in case it
searches for the letters in the custom extension. For example,
"rv64imac_xandes" will be treated as D extension support since
there is a "d" in "andes", resulting illegal instruction caused
by initializing FCSR.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
arch/riscv/cpu/cpu.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 52ab02519f..d34c8efce0 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -36,6 +36,7 @@ static inline bool supports_extension(char ext)
#ifdef CONFIG_CPU
struct udevice *dev;
char desc[32];
+ int i;
uclass_find_first_device(UCLASS_CPU, &dev);
if (!dev) {
@@ -43,9 +44,16 @@ static inline bool supports_extension(char ext)
return false;
}
if (!cpu_get_desc(dev, desc, sizeof(desc))) {
- /* skip the first 4 characters (rv32|rv64) */
- if (strchr(desc + 4, ext))
- return true;
+ /*
+ * skip the first 4 characters (rv32|rv64) and
+ * check until underscore
+ */
+ for (i = 4; i < sizeof(desc); i++) {
+ if (desc[i] == '_' || desc[i] == '\0')
+ break;
+ if (desc[i] == ext)
+ return true;
+ }
}
return false;
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2] riscv: Fix detecting FPU support in standard extension
[not found] ` <HK0PR03MB2994D5179CFED4510DB0DCCDC1019@HK0PR03MB2994.apcprd03.prod.outlook.com>
@ 2022-11-10 7:45 ` Rick Chen
0 siblings, 0 replies; 5+ messages in thread
From: Rick Chen @ 2022-11-10 7:45 UTC (permalink / raw)
To: peterlin; +Cc: U-Boot Mailing List, samuel, rick, Leo Liang
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Yu Chien Peter Lin
> Sent: Saturday, November 05, 2022 2:02 PM
> To: u-boot@lists.denx.de
> Cc: samuel@sholland.org; Peter Yu-Chien Lin(林宇謙) <peterlin@andestech.com>
> Subject: [PATCH v2] riscv: Fix detecting FPU support in standard extension
>
> We should check the string until it hits underscore, in case it searches for the letters in the custom extension. For example, "rv64imac_xandes" will be treated as D extension support since there is a "d" in "andes", resulting illegal instruction caused by initializing FCSR.
>
> Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
> ---
> arch/riscv/cpu/cpu.c | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
Reviewed-by: Rick Chen <rick@andestech.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] riscv: Fix detecting FPU support in standard extension
2022-11-05 6:02 [PATCH v2] riscv: Fix detecting FPU support in standard extension Yu Chien Peter Lin
[not found] ` <HK0PR03MB2994D5179CFED4510DB0DCCDC1019@HK0PR03MB2994.apcprd03.prod.outlook.com>
@ 2022-11-10 12:30 ` Padmarao.Begari
2022-11-13 21:47 ` Samuel Holland
2 siblings, 0 replies; 5+ messages in thread
From: Padmarao.Begari @ 2022-11-10 12:30 UTC (permalink / raw)
To: u-boot, peterlin; +Cc: samuel
> On Sat, 2022-11-05 at 14:02 +0800, Yu Chien Peter Lin wrote:
>
> We should check the string until it hits underscore, in case it
> searches for the letters in the custom extension. For example,
> "rv64imac_xandes" will be treated as D extension support since
> there is a "d" in "andes", resulting illegal instruction caused
> by initializing FCSR.
>
> Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
> ---
> arch/riscv/cpu/cpu.c | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> index 52ab02519f..d34c8efce0 100644
> --- a/arch/riscv/cpu/cpu.c
> +++ b/arch/riscv/cpu/cpu.c
> @@ -36,6 +36,7 @@ static inline bool supports_extension(char ext)
> #ifdef CONFIG_CPU
> struct udevice *dev;
> char desc[32];
> + int i;
>
> uclass_find_first_device(UCLASS_CPU, &dev);
> if (!dev) {
> @@ -43,9 +44,16 @@ static inline bool supports_extension(char ext)
> return false;
> }
> if (!cpu_get_desc(dev, desc, sizeof(desc))) {
> - /* skip the first 4 characters (rv32|rv64) */
> - if (strchr(desc + 4, ext))
> - return true;
> + /*
> + * skip the first 4 characters (rv32|rv64) and
> + * check until underscore
> + */
> + for (i = 4; i < sizeof(desc); i++) {
> + if (desc[i] == '_' || desc[i] == '\0')
> + break;
> + if (desc[i] == ext)
> + return true;
> + }
>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
> }
>
> return false;
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] riscv: Fix detecting FPU support in standard extension
2022-11-05 6:02 [PATCH v2] riscv: Fix detecting FPU support in standard extension Yu Chien Peter Lin
[not found] ` <HK0PR03MB2994D5179CFED4510DB0DCCDC1019@HK0PR03MB2994.apcprd03.prod.outlook.com>
2022-11-10 12:30 ` Padmarao.Begari
@ 2022-11-13 21:47 ` Samuel Holland
2022-11-14 8:48 ` Yu-Chien Peter Lin
2 siblings, 1 reply; 5+ messages in thread
From: Samuel Holland @ 2022-11-13 21:47 UTC (permalink / raw)
To: Yu Chien Peter Lin; +Cc: u-boot
On 11/5/22 01:02, Yu Chien Peter Lin wrote:
> We should check the string until it hits underscore, in case it
> searches for the letters in the custom extension. For example,
> "rv64imac_xandes" will be treated as D extension support since
> there is a "d" in "andes", resulting illegal instruction caused
> by initializing FCSR.
>
> Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
> ---
> arch/riscv/cpu/cpu.c | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> index 52ab02519f..d34c8efce0 100644
> --- a/arch/riscv/cpu/cpu.c
> +++ b/arch/riscv/cpu/cpu.c
> @@ -36,6 +36,7 @@ static inline bool supports_extension(char ext)
> #ifdef CONFIG_CPU
> struct udevice *dev;
> char desc[32];
> + int i;
>
> uclass_find_first_device(UCLASS_CPU, &dev);
> if (!dev) {
> @@ -43,9 +44,16 @@ static inline bool supports_extension(char ext)
> return false;
> }
> if (!cpu_get_desc(dev, desc, sizeof(desc))) {
> - /* skip the first 4 characters (rv32|rv64) */
> - if (strchr(desc + 4, ext))
> - return true;
> + /*
> + * skip the first 4 characters (rv32|rv64) and
> + * check until underscore
> + */
This probably works for the intended usage, but it is not guaranteed to
work. Underscores are allowed even between single-letter extensions. See
section 29.5 ("Underscores") of the unprivileged spec. Still, this is an
improvement, so:
Reviewed-by: Samuel Holland <samuel@sholland.org>
> + for (i = 4; i < sizeof(desc); i++) {
> + if (desc[i] == '_' || desc[i] == '\0')
> + break;
> + if (desc[i] == ext)
> + return true;
> + }
> }
>
> return false;
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] riscv: Fix detecting FPU support in standard extension
2022-11-13 21:47 ` Samuel Holland
@ 2022-11-14 8:48 ` Yu-Chien Peter Lin
0 siblings, 0 replies; 5+ messages in thread
From: Yu-Chien Peter Lin @ 2022-11-14 8:48 UTC (permalink / raw)
To: Samuel Holland; +Cc: u-boot
On Sun, Nov 13, 2022 at 03:47:38PM -0600, Samuel Holland wrote:
> On 11/5/22 01:02, Yu Chien Peter Lin wrote:
> > We should check the string until it hits underscore, in case it
> > searches for the letters in the custom extension. For example,
> > "rv64imac_xandes" will be treated as D extension support since
> > there is a "d" in "andes", resulting illegal instruction caused
> > by initializing FCSR.
> >
> > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
> > ---
> > arch/riscv/cpu/cpu.c | 14 +++++++++++---
> > 1 file changed, 11 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> > index 52ab02519f..d34c8efce0 100644
> > --- a/arch/riscv/cpu/cpu.c
> > +++ b/arch/riscv/cpu/cpu.c
> > @@ -36,6 +36,7 @@ static inline bool supports_extension(char ext)
> > #ifdef CONFIG_CPU
> > struct udevice *dev;
> > char desc[32];
> > + int i;
> >
> > uclass_find_first_device(UCLASS_CPU, &dev);
> > if (!dev) {
> > @@ -43,9 +44,16 @@ static inline bool supports_extension(char ext)
> > return false;
> > }
> > if (!cpu_get_desc(dev, desc, sizeof(desc))) {
> > - /* skip the first 4 characters (rv32|rv64) */
> > - if (strchr(desc + 4, ext))
> > - return true;
> > + /*
> > + * skip the first 4 characters (rv32|rv64) and
> > + * check until underscore
> > + */
>
> This probably works for the intended usage, but it is not guaranteed to
> work. Underscores are allowed even between single-letter extensions. See
> section 29.5 ("Underscores") of the unprivileged spec. Still, this is an
> improvement, so:
>
> Reviewed-by: Samuel Holland <samuel@sholland.org>
Aah, I missed that case.
I supposed the strings always match the pattern stated in riscv cpus
binding [1], the detection logic here needs to be updated once the
case is also allowed.
[1] https://github.com/torvalds/linux/blob/v6.1-rc5/Documentation/devicetree/bindings/riscv/cpus.yaml#L83
Thanks for your review!
Best regards,
Peter Lin
>
> > + for (i = 4; i < sizeof(desc); i++) {
> > + if (desc[i] == '_' || desc[i] == '\0')
> > + break;
> > + if (desc[i] == ext)
> > + return true;
> > + }
> > }
> >
> > return false;
>
^ permalink raw reply [flat|nested] 5+ messages in thread
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2022-11-05 6:02 [PATCH v2] riscv: Fix detecting FPU support in standard extension Yu Chien Peter Lin
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2022-11-10 7:45 ` Rick Chen
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2022-11-13 21:47 ` Samuel Holland
2022-11-14 8:48 ` Yu-Chien Peter Lin
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