From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3F9A4C004D4 for ; Thu, 19 Jan 2023 19:26:10 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BD50D851E6; Thu, 19 Jan 2023 20:26:07 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="aUU7zPu/"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id B53858481F; Thu, 19 Jan 2023 20:26:05 +0100 (CET) Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id ACB3B851E6 for ; Thu, 19 Jan 2023 20:26:02 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=conor@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 470EEB821F1; Thu, 19 Jan 2023 19:26:02 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ACBB2C433EF; Thu, 19 Jan 2023 19:25:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1674156361; bh=BwzfR23uLto+pc09g1I+mvU2rnqmCLy47btwRDME+MI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=aUU7zPu//ImMCjFmA4QbqhQbO7gBwVWH4Z0xY6mX3NAnNWMxFzUNDo2ugQkxy6cz1 QJ2EjXXowMOvlZBoK8qPxhEfaGkDrwV/R143CzBzUNd10LtcUWbndmk+d86V5/dW2o OFQMeHFIR+yMNqRTKvh4pLvSQabHt4M2Mbe2euJyGWASALnLDQnQ2umOF3kDBEdS9H 0KNoLHKXv54AFrtCmXFoj6PviKKBuuY4dbDvx/Eswb6ppRdL6BXRYFHjNfsJIJlGdX XCN2pwSxRddtBfu2S94afYcWz9bf6rrXXGl9CyVvny2f/FUzRo9SXAuyffvt5nmTwA M/hDCzsdj0TWQ== Date: Thu, 19 Jan 2023 19:25:56 +0000 From: Conor Dooley To: Sean Anderson Cc: Sean Anderson , David Abdurachmanov , Yanhong Wang , u-boot@lists.denx.de, Rick Chen , Leo , Lukasz Majewski , Lee Kuan Lim , Jianlong Huang , Emil Renner Berthing Subject: Re: [PATCH v2 14/17] riscv: dts: jh7110: Add initial StarFive JH7110 device tree Message-ID: References: <20230118081132.31403-1-yanhong.wang@starfivetech.com> <20230118081132.31403-15-yanhong.wang@starfivetech.com> <022f9da1-75db-40e9-2823-dbbf1cb6f3f5@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="kLS8SiyySjkeoef5" Content-Disposition: inline In-Reply-To: X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean --kLS8SiyySjkeoef5 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Jan 19, 2023 at 02:16:51PM -0500, Sean Anderson wrote: > On 1/19/23 13:30, Conor Dooley wrote: > > Hey Se=E1n, David, > >=20 > > On Thu, Jan 19, 2023 at 01:26:52AM -0500, Sean Anderson wrote: > >> On 1/19/23 01:18, David Abdurachmanov wrote: > >> > On Wed, Jan 18, 2023 at 10:19 AM Yanhong Wang > >> > wrote: > >=20 > >> > > + U74_4: cpu@4 { > >> > > + compatible =3D "sifive,u74-mc", "riscv"; > >> > > + reg =3D <4>; > >> > > + d-cache-block-size =3D <64>; > >> > > + d-cache-sets =3D <64>; > >> > > + d-cache-size =3D <32768>; > >> > > + d-tlb-sets =3D <1>; > >> > > + d-tlb-size =3D <40>; > >> > > + device_type =3D "cpu"; > >> > > + i-cache-block-size =3D <64>; > >> > > + i-cache-sets =3D <64>; > >> > > + i-cache-size =3D <32768>; > >> > > + i-tlb-sets =3D <1>; > >> > > + i-tlb-size =3D <40>; > >> > > + mmu-type =3D "riscv,sv39"; > >> > > + next-level-cache =3D <&ccache>; > >> > > + riscv,isa =3D "rv64imafdcbsu"; > >> >=20 > >> > Looking at SiFive U74 manuals, shouldn't this be RV64GC_Zba_Zbb_Ssco= fpmf? > >> > U74 only supports Zba and Zbb bit manip extensions. > >> > This is from the 21G3.02.00 release manual. > >> >=20 > >> > Looking more, S76 core is listed in the manual as supporting up to: > >> > RV64IMAC_Zicsr_Zifencei_Zba_Zbb_Sscofpmf. > >> >=20 > >> > I almost forgot about _Zicsr_Zifencei (which are part of G). Shouldn= 't > >> > those be listed too in riscv,isa? > >=20 > > AFAIU, Linux just assumes them since they weren't their own thing prior > > to ISA spec 20191213. I think in- & ex- cluding them are both valid... > > Yeah. > >=20 > >> AFAIK we don't support Z/X in U-Boot. > >=20 > > Does the U-Boot ISA string parsing not just ignore un-implemented > > extensions? If it does ignore things you don't implement, then I think > > including the Z extensions should be no harm. > > IMO, it'd be nice to have this string match whatever the hardware can > > support so that same Devicetree can be used for U-Boot & whatever OS it > > is booting. >=20 > We use strchr on it; so something like Zicsr is parsed as 5 extensions. oof, that's rough :( Just waiting until someone comes along that *needs* one of these extensions to be functional? > See supports_extension for details Will do, thanks! Conor. --kLS8SiyySjkeoef5 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY8mZRAAKCRB4tDGHoIJi 0tJ2APoD9Cez8ZROJoBnUQtPvvQXT/kOhphfy7jpryYbPOmP9QD9GhmhQ15PJBJO lvkQH4bTC9mt2Vz9I6rM9DNpHIXf1gE= =e6n8 -----END PGP SIGNATURE----- --kLS8SiyySjkeoef5--