From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D8D3CC27C76 for ; Sat, 21 Jan 2023 21:36:20 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A184F85203; Sat, 21 Jan 2023 22:36:17 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="dqzRaFE9"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 83BF783CB4; Sat, 21 Jan 2023 22:36:15 +0100 (CET) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3A3C185203 for ; Sat, 21 Jan 2023 22:36:12 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=conor@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id F151F60B6A; Sat, 21 Jan 2023 21:36:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7F11FC433D2; Sat, 21 Jan 2023 21:36:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1674336969; bh=P85S0Q6LwNUAx3ORN7rvogpAnZo7kqyuINgutJoVAGc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=dqzRaFE9OYZj/eGtuzKW5hHfHdIsmjzYYkwuV42O5VN0IJwCWVptHajfHeLZmOXe2 NQ2kCRDdYpGKieL8BwRAGRgfANTGq4cnxRhFpc1D8YGvIbidP1qr5aErQtFLohwbb6 ByYElGsk1/XYb2g1CYR1Wf1Q0AUiyWFC2EmUBNfiNsrYf3kM4ZV4JCBiZvf/cAxhzG AUxHeSvnRYR2A9agNGw4SuSV6ictcMmrgyu/28Coe+kLhXxEb11Gz1h/A4K+pKEu6H TmNcYypjhiD3kEIXDnQN7xsBZh5V76djBemRDTYL9rjSRjIER8O7UllXGeuEQxUTp4 8TAMBbW34pFuQ== Date: Sat, 21 Jan 2023 21:36:04 +0000 From: Conor Dooley To: Yanhong Wang Cc: u-boot@lists.denx.de, Rick Chen , Leo , Lukasz Majewski , Sean Anderson , Lee Kuan Lim , Jianlong Huang , Emil Renner Berthing Subject: Re: [PATCH v2 00/17] Basic StarFive JH7110 RISC-V SoC support Message-ID: References: <20230118081132.31403-1-yanhong.wang@starfivetech.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="JhVwtWel6OoWcUi2" Content-Disposition: inline In-Reply-To: <20230118081132.31403-1-yanhong.wang@starfivetech.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean --JhVwtWel6OoWcUi2 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jan 18, 2023 at 04:11:15PM +0800, Yanhong Wang wrote: > This series of patches base on the latest branch/master, and add support > for the StarFive JH7110 RISC-V SoC and VisionFive V2 board. In order for > this to be achieved, the respective DT nodes have been added, and the > required defconfigs have been added to the boards' defconfig. What is mor= e, > the basic required DM drivers have been added, such as reset, clock, pinc= trl, > uart, ram etc. >=20 > Note that the register base address of reset controller is same with the > clock controller. Therefore, there is no device tree node alone for reset > driver. It binds device node in the clock driver. >=20 > The u-boot-spl and u-boot has been tested on the VisionFive V2 boards whi= ch > equip with JH7110 SoC and works normally. >=20 > For more information and support, you can visit RVspace wiki[1]. >=20 > [1] https://wiki.rvspace.org/ >=20 > Changes in v2: > - Renamed file 'jh7110-regs.h' to 'regs.h'. > - Reworded the clear L2 LIM memory code in C. > - Removed flash init call in 'spl_soc_init' function. > - Reworded the clock driver. > - Rename the macro 'SET_DIV' to 'ASSIGNED_CLOCK_PARENTS' in 'spl.c'. > - Moved the device tree node 'dmc@15700000' from 'jh7110-u-boot.dtsi' to > 'starfive_visionfive2-u-boot.dtsi'. >=20 > Previous versions: > v1 - https://patchwork.ozlabs.org/project/uboot/cover/20221212025020.2377= 8-1-yanhong.wang@starfivetech.com/ >=20 > Jianlong Huang (1): > dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions >=20 > Kuan Lim Lee (1): > pinctrl: starfive: Add StarFive JH7110 driver >=20 > Yanhong Wang (15): > riscv: cpu: jh7110: Add support for jh7110 SoC > cache: starfive: Add StarFive JH7110 support > dt-bindings: reset: Add StarFive JH7110 reset definitions > reset: starfive: jh7110: Add reset driver for StarFive JH7110 SoC > dt-bindings: clock: Add StarFive JH7110 clock definitions > clk: starfive: Add StarFive JH7110 clock driver > ram: starfive: add ddr driver > board: starfive: add StarFive VisionFive v2 board support > riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC > board: starfive: Add Kconfig for StarFive VisionFive v2 Board > board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig > riscv: dts: jh7110: Add initial StarFive JH7110 device tree > riscv: dts: jh7110: Add initial u-boot device tree > riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device > tree > configs: starfive: add starfive_visionfive2_defconfig Apologies if I have missed it somewhere - but where is patch 12? I don't see it on lore.kernel.org nor in my inbox :( Thanks, Conor. --JhVwtWel6OoWcUi2 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY8xaxAAKCRB4tDGHoIJi 0gGCAP4vlxBbTGFYzqQ9Oil4Fyqj8vgEwWShvRzVZiQfXS9b+wD+PfifxRBLmHdi bnK1TZPR1492oT2ObvjbHZQMn2+p2w4= =nu0+ -----END PGP SIGNATURE----- --JhVwtWel6OoWcUi2--