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[2603:6081:7b00:6400:31da:362:f50e:b4ac]) by smtp.gmail.com with ESMTPSA id u9-20020ae9c009000000b0072526a43ef7sm118789qkk.120.2023.01.30.10.59.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:59:23 -0800 (PST) Date: Mon, 30 Jan 2023 13:59:21 -0500 From: Tom Rini To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Mark Kettenis , Marek =?iso-8859-1?Q?Beh=FAn?= , Simon Glass , u-boot@lists.denx.de, sr@denx.de Subject: Re: [PATCH 016/171] iommu: Add a Kconfig for SPL_PINCTRL_ARMADA_38X Message-ID: References: <20230130144324.206208-1-sjg@chromium.org> <20230130144324.206208-17-sjg@chromium.org> <87k014knbe.fsf@bloch.sibelius.xs4all.nl> <20230130181626.mramh3hgwwmtdm2n@pali> <20230130182856.mdesbicogb623wdo@pali> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="vZknSu6Ee1E86VnA" Content-Disposition: inline In-Reply-To: <20230130182856.mdesbicogb623wdo@pali> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean --vZknSu6Ee1E86VnA Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jan 30, 2023 at 07:28:56PM +0100, Pali Roh=E1r wrote: > On Monday 30 January 2023 13:25:25 Tom Rini wrote: > > On Mon, Jan 30, 2023 at 07:16:26PM +0100, Pali Roh=E1r wrote: > > > On Monday 30 January 2023 11:29:27 Tom Rini wrote: > > > > On Mon, Jan 30, 2023 at 05:19:01PM +0100, Mark Kettenis wrote: > > > > > > From: Simon Glass > > > > > > Date: Mon, 30 Jan 2023 07:40:49 -0700 > > > > > >=20 > > > > > > This is implicitly used in the source and seems useful, so add = it. > > > > >=20 > > > > > Not sure how this ended up with an "iommu" tag, but that seems wr= ong. > > > > >=20 > > > > > > Signed-off-by: Simon Glass > > > > > > --- > > > > > >=20 > > > > > > drivers/pinctrl/mvebu/Kconfig | 4 ++++ > > > > > > 1 file changed, 4 insertions(+) > > > > > >=20 > > > > > > diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mv= ebu/Kconfig > > > > > > index 7c51d138c8b..0b2be88e3a1 100644 > > > > > > --- a/drivers/pinctrl/mvebu/Kconfig > > > > > > +++ b/drivers/pinctrl/mvebu/Kconfig > > > > > > @@ -7,6 +7,10 @@ config PINCTRL_ARMADA_38X > > > > > > Support pin multiplexing and pin configuration control on > > > > > > Marvell's Armada-38x SoC. > > > > > > =20 > > > > > > +config SPL_PINCTRL_ARMADA_38X > > > > > > + def_bool n # Armada 38x pin control driver (SPL) > > > > > > + depends on SPL && ARMADA_38X && SPL_PINCTRL_FULL > > > > > > + > > > > > > config PINCTRL_ARMADA_37XX > > > > > > depends on ARMADA_3700 && PINCTRL_FULL > > > > > > bool "Armada 37xx pin control driver" > > > >=20 > > > > Looking at the code in question, it's because in > > > > drivers/gpio/mvebu_gpio.c we conditionally not set request / rfree > > > > dm_gpio_ops because turris_omnia (only platform in question) does n= ot > > > > set pinctrl in SPL, but does set SPL_DM_GPIO. So the question I hav= e, is > > > > all of that intentional and used today, in SPL, on the platform? I = guess > > > > some set/get directions / values, to check board revs or something? > > >=20 > > > I think this is because no A38x board use DM pinctrl framework for > > > configuring pin muxing. All boards set pin muxing in open coded board > > > function which directly touch HW registers. DM pinctrl driver for A38x > > > is relatively new and I think nobody converted any board to use it for > > > initialization. > >=20 > > I do see that turris_omnia builds the pinctrl driver for full U-Boot > > today. >=20 > Yes, it allows u-boot pinmux command to print current pinctrl > configuration and also allows gpio command to work correctly for gpios > which are not in gpio mode by default. >=20 > > But, does that mean that at some point in the future it should > > be converted to use SPL_PINCTRL ? >=20 > Every a38x board could be converted. But personally I'm not planning to > do it. OK, but if someone were to do it, it would then be the case that PINCTRL_ARMADA_38X would be the driver used, yes? > > As that would imply that we do not > > need / want SPL_PINCTRL_ARMADA_38X added (I suspect SPL_PINCTRL_STMFX > > and SPL_PINCTRL_ROCKCHIP are wrong) as it will be handled like the > > majority of other platforms in this area. As I look at this more, I see that SPL_PINCTRL_STMFX _is_ one of the special cases as it seems in SPL they use the PINCTRL_STM32 driver and do _not_ want PINCTRL_STMFX so SPL_PINCTRL_STMFX is introduced as a way to keep the driver from being built in SPL. --=20 Tom --vZknSu6Ee1E86VnA Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmPYE4YACgkQFHw5/5Y0 tyxQcQv8D9GB2wkR+UvRhOSYvh15tJfrZuBy9U1o59BT/nRq2DhFSUZs+3dcVjCx E0lbFW3tBc5X+VgTR5i9cWxxrFSFJR1TzkSOkL6kQ8CG3jFitS7D8d7oUqQy3uaB NhZaSnHk88u3I3ujZ2Tx9zniFwIXtwO2IEzet8PBx+Ae2chVkVNxPHEtpBcFeb4w fOAAgCsIW5fDiw1vae8t0vKlqBuTZNkZpdm9uEFn7o8L6Bab7fcUR87znBT03H9F dXp4V2O4drhc2xSwhVBon+cMlHjSCI3Gw/VJ6Tq8V1fA1RYKbJV818Q6uWCBqjuD 0s5m4ZdC5BoAgHqe1W6xgLj+Wh9N2RFqsesn2PwNjz02i0Z6OfghRAfr4AZQjzob r4c+CTKexCzmOr4/7Py0XyF6Z4i5eOf0VYXZSmX3iHb+hZ3/G5LXbJ6lh0HAtUlU Kxi51IOzsTTAXyGENAROi9+ChTSNdOx84Gr+DHyoxChgZDmBiw3lXPLEHdAoau63 HgRH6Bj1 =P4Z7 -----END PGP SIGNATURE----- --vZknSu6Ee1E86VnA--