From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51035C07E9B for ; Mon, 12 Jul 2021 06:24:51 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D0F83611C0 for ; Mon, 12 Jul 2021 06:24:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D0F83611C0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 479A582CC6; Mon, 12 Jul 2021 08:24:22 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="XzEcUzvI"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 3C87782C6E; Mon, 12 Jul 2021 08:24:20 +0200 (CEST) Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C5CA382C6E for ; Mon, 12 Jul 2021 08:24:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ilias.apalodimas@linaro.org Received: by mail-wm1-x330.google.com with SMTP id h18-20020a05600c3512b029020e4ceb9588so13628651wmq.5 for ; Sun, 11 Jul 2021 23:24:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=QvapdDUFWWILtrt2rRTCR0zqcx6A4QTQ3aTJlnU4fRg=; b=XzEcUzvIYovIbQSkpi3ypjtMQPR+gjxBpc4Ujo50SB1gwcUbOk0IOP6gh63EjUeT6u PBApblZjSWuBTuNqxfIYNa42c+U/nq6ICSIjAp4KRRmtI0UlAo4SSySdER1IVQSzcXOG F9rWGxCwwpXQtgYCEKFQF8YhHxzeIOqzdYleQUCUNEo8ADqg78fYPtG9+rphqlgmF+FS pgq9ZiAUvfJAy5yqUf4ix2KJmk0K2GUkWwZOn4vLQBqwioGZu5svAnlmegmLP0lwkZdm AL/nFj60UX7KLeUfNqagIGoSj+Yplfw3HDMTK9mpcGjXtlD/BpSm+sMn/b3D0C+rS2Cz 8wDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=QvapdDUFWWILtrt2rRTCR0zqcx6A4QTQ3aTJlnU4fRg=; b=JLIM4ejSlT0je9rRgoYZnPTfArCZTwuywxQeYp8CR+h6QCXWX6HDdtlG2T4zsr/vid Te1rNg0QmfBRurBjjSn+lV/Q82GBBVNHFQSS/qgbv1hxNWhInUla8XSu1b0kGPnJAT2g x3k0S0EcYFitqd1wxgnNjq3BPeEpU1aJadoeqUWTCRRmAH/R37GuOZwDQdHGvRK2fE8M LM6AMwRTji185E5nuswd5EamGKNiGG9LtmvwSl8BMuePASlry7wNpCvomqk+uwWNturl MUVzT4qDWOjVHYCPMGLReSh5RmPb2+t0d8siJGcqIkPNgZ0BxZ53I5z/+cccgFRTULqB aAyw== X-Gm-Message-State: AOAM532xMkLo+6gfZrOnHQ4XStnUhzc/mfhDabirwtt1qpIIbs4WQf7O VwcvJU3qD93YByCeZ133R7M0WQ== X-Google-Smtp-Source: ABdhPJyWMdotLHDT3zAt3we2gocIuvct6fdx3j4hRhlHQFEJ7TD2W1r1voBjKGuN/nqUcKo4qR1TCA== X-Received: by 2002:a05:600c:35c6:: with SMTP id r6mr12765854wmq.14.1626071056295; Sun, 11 Jul 2021 23:24:16 -0700 (PDT) Received: from Iliass-MBP (athedsl-417902.home.otenet.gr. [79.131.184.108]) by smtp.gmail.com with ESMTPSA id g3sm13576816wrv.64.2021.07.11.23.24.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jul 2021 23:24:15 -0700 (PDT) Date: Mon, 12 Jul 2021 09:24:12 +0300 From: Ilias Apalodimas To: Simon Glass Cc: Heinrich Schuchardt , Johannes Holland , Masahisa Kojima , Dhananjay Phadke , U-Boot Mailing List Subject: Re: [PATCH 1/2 v2] tpm2: Introduce TIS tpm core Message-ID: References: <20210707162604.84196-1-ilias.apalodimas@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On Sat, Jul 10, 2021 at 06:00:57PM -0600, Simon Glass wrote: > Hi Ilias, > > On Wed, 7 Jul 2021 at 10:26, Ilias Apalodimas > wrote: > > > > There's a lot of code duplication in U-Boot right now. All the TPM TIS > > You mean in the TPM code I think. > Yes. Basically al TPM drivers duplicate this. > > compatible drivers we have at the moment have their own copy of a TIS > > implementation. > > > > So let's create a common layer which implements the core TIS functions. > > Any driver added from now own, which is compatible with the TIS spec, will > > only have to provide the underlying bus communication mechanisms. > > > > Signed-off-by: Ilias Apalodimas > > --- > > Changes since v1: > > - > > drivers/tpm/tpm2_tis_core.c | 545 ++++++++++++++++++++++++++++++++++++ > > drivers/tpm/tpm_tis.h | 40 +++ > > include/tpm-v2.h | 1 + > > 3 files changed, 586 insertions(+) > > create mode 100644 drivers/tpm/tpm2_tis_core.c > > [..] > > > diff --git a/drivers/tpm/tpm_tis.h b/drivers/tpm/tpm_tis.h > > index 2a160fe05c9a..fde3bb71f7c2 100644 > > --- a/drivers/tpm/tpm_tis.h > > +++ b/drivers/tpm/tpm_tis.h > > @@ -21,6 +21,37 @@ > > #include > > #include > > > > +struct tpm_tis_phy_ops { > > + int (*read_bytes)(struct udevice *udev, u32 addr, u16 len, > > + u8 *result); > > + int (*write_bytes)(struct udevice *udev, u32 addr, u16 len, > > + const u8 *value); > > + int (*read16)(struct udevice *udev, u32 addr, u16 *result); > > + int (*read32)(struct udevice *udev, u32 addr, u32 *result); > > + int (*write32)(struct udevice *udev, u32 addr, u32 src); > > A few points: > > - these need comments > - can we use uint instead of u32 for the value args? We should use > native types where we can Yes probably, I'll have a look ` > - it seems like this should be a driver interface - see for example > how cros_ec.c works. It has a shared code library and the drivers each > implement an interface similar to the above, but on different buses. > In general function pointers are a sign we should be using a driver > I am not sure I am following, but I'll have a look on the code you pointed out. > > +}; > > + > > +enum tis_int_flags { > > + TPM_GLOBAL_INT_ENABLE = 0x80000000, > > + TPM_INTF_BURST_COUNT_STATIC = 0x100, > > + TPM_INTF_CMD_READY_INT = 0x080, > > + TPM_INTF_INT_EDGE_FALLING = 0x040, > > + TPM_INTF_INT_EDGE_RISING = 0x020, > > + TPM_INTF_INT_LEVEL_LOW = 0x010, > > + TPM_INTF_INT_LEVEL_HIGH = 0x008, > > + TPM_INTF_LOCALITY_CHANGE_INT = 0x004, > > + TPM_INTF_STS_VALID_INT = 0x002, > > + TPM_INTF_DATA_AVAIL_INT = 0x001, > > +}; > > + > > +#define TPM_ACCESS(l) (0x0000 | ((l) << 12)) > > +#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) > > +#define TPM_STS(l) (0x0018 | ((l) << 12)) > > +#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) > > +#define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) > > +#define TPM_RID(l) (0x0F04 | ((l) << 12)) > > +#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) > > + > > enum tpm_timeout { > > TPM_TIMEOUT_MS = 5, > > TIS_SHORT_TIMEOUT_MS = 750, > > @@ -43,6 +74,7 @@ struct tpm_chip { > > u8 rid; > > unsigned long timeout_a, timeout_b, timeout_c, timeout_d; /* msec */ > > ulong chip_type; > > + struct tpm_tis_phy_ops *phy_ops; > > }; > > > > struct tpm_input_header { > > @@ -130,4 +162,12 @@ enum tis_status { > > }; > > #endif > > > > +int tpm_tis_open(struct udevice *udev); > > +int tpm_tis_close(struct udevice *udev); > > +int tpm_tis_cleanup(struct udevice *udev); > > +int tpm_tis_send(struct udevice *udev, const u8 *buf, size_t len); > > +int tpm_tis_recv(struct udevice *udev, u8 *buf, size_t count); > > +int tpm_tis_get_desc(struct udevice *udev, char *buf, int size); > > +int tpm_tis_init(struct udevice *udev); > > +void tpm_tis_ops_register(struct udevice *udev, struct tpm_tis_phy_ops *ops); > > comments on all of these > > > #endif > > diff --git a/include/tpm-v2.h b/include/tpm-v2.h > > index 247b38696766..3e48e358613f 100644 > > --- a/include/tpm-v2.h > > +++ b/include/tpm-v2.h > > @@ -378,6 +378,7 @@ enum { > > TPM_STS_DATA_EXPECT = 1 << 3, > > TPM_STS_SELF_TEST_DONE = 1 << 2, > > TPM_STS_RESPONSE_RETRY = 1 << 1, > > + TPM_STS_READ_ZERO = 0x23 > > Does this below in another patch? > It's a general tpm2 update. I can move it to the driver patch if it makes more sense. > > }; > > > > enum { > > -- > > 2.32.0.rc0 > > > > I feel that this API could be useful in reducing code duplication, but > in fact it has just created more, so far as I can see from this series > :-) So I think you should convert at least one driver to show its > value (and not make things any worse). The mmio tpm driver uses it and instead of ~700 lines (like the tpmv2 spi driver) it drops down to ~100. I don't have access to any other TPM hardware to rewrite any of those. > > Regards, > Simon