From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C69E5C433EF for ; Tue, 19 Oct 2021 08:31:01 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BFE9361264 for ; Tue, 19 Oct 2021 08:31:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org BFE9361264 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0D2A381BC8; Tue, 19 Oct 2021 10:30:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 2967382128; Tue, 19 Oct 2021 10:30:56 +0200 (CEST) Received: from ATCSQR.andestech.com (exmail.andestech.com [60.248.187.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E87CA81BC8 for ; Tue, 19 Oct 2021 10:30:51 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by ATCSQR.andestech.com with ESMTP id 19J8UOSq000488; Tue, 19 Oct 2021 16:30:24 +0800 (GMT-8) (envelope-from ycliang@andestech.com) Received: from ubuntu02 (10.0.12.212) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Tue, 19 Oct 2021 16:30:22 +0800 Date: Tue, 19 Oct 2021 16:30:15 +0800 From: Leo Liang To: Nick Hu CC: , , , , Subject: Re: [PATCH] riscv: Avoid io read/write cause wrong result Message-ID: References: <20211018035005.16842-1-nick.hu@sifive.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20211018035005.16842-1-nick.hu@sifive.com> User-Agent: Mutt/2.0.5 (2021-01-21) X-Originating-IP: [10.0.12.212] X-DNSRBL: X-MAIL: ATCSQR.andestech.com 19J8UOSq000488 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On Mon, Oct 18, 2021 at 11:50:05AM +0800, Nick Hu wrote: > io read/write may cause wrong result because they may read/write data > from/to register instead of memory. Add 'volatile' to avoid it. > > Signed-off-by: Nick Hu > --- > arch/riscv/include/asm/io.h | 18 +++++++++--------- > 1 file changed, 9 insertions(+), 9 deletions(-) > Reviewed-by: Leo Yu-Chi Liang