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From: Ilias Apalodimas <ilias.apalodimas@linaro.org>
To: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de, trini@konsulko.com,
	Rick Chen <rick@andestech.com>, Sean Anderson <seanga2@gmail.com>,
	Heinrich Schuchardt <xypron.glpk@gmx.de>,
	Masahisa Kojima <masahisa.kojima@linaro.org>
Subject: Re: [PATCH 2/6 v4] tpm2: Add a TPMv2 MMIO TIS driver
Date: Fri, 5 Nov 2021 10:23:25 +0200	[thread overview]
Message-ID: <YYTp/R2Ca71uTSSf@apalos.home> (raw)
In-Reply-To: <YYTokflM1yszqoxD@apalos.home>

On Fri, Nov 05, 2021 at 10:17:21AM +0200, Ilias Apalodimas wrote:
> Hi Simon, 
> 
> [...]
> 
> > > +                          u8 *result)
> > > +{
> > > +       struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(udev);
> > > +
> > > +       while (len--)
> > > +               *result++ = ioread8(drv_data->iobase + addr);
> > > +       return 0;
> > > +}
> > > +
> > > +static int mmio_write_bytes(struct udevice *udev, u32 addr, u16 len,
> > > +                           const u8 *value)
> > > +{
> > > +       struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(udev);
> > > +
> > > +       while (len--)
> > > +               iowrite8(*value++, drv_data->iobase + addr);
> > 
> > So should this use regmap?
> > 
> 
> Isn't the point of regmap abstracting the bus access itself? Something
> along the lines of 
> 
> ********			**********       ***********
> * SPI **  --> 		*        * -->   * SPI DM ** --> Device
> ********			*        *       ***********
> 					* REGMAP *
> ********			*        *
> * MMIO *  -->		*        * -->   **************
> ********			**********		 * MMIO access*  --> Device
> 									 **************
> 

Hopefully I'll get the ASCII right this time...

********          **********       ***********
* SPI **  -->     *        * -->   * SPI DM ** --> Device
********          *        *       ***********
                  * REGMAP *
********          *        *
* MMIO *  -->     *        * -->   **************
********          **********       * MMIO access*  --> Device
                                   **************
> Right now we have discrete drivers for the SPI and MMIO TPMs.
> However using it makes sense if we want to merge parts of the SPI, MMIO and I2C
> drivers in the future. That though is not what this patchset deals with. 
> Let's first clean up the crud of the TIS APIs duplication  we've been
> carrying over various TPM drivers and worry about consolidating the bus
> accesses later.
> 
> Thanks
> /Ilias
> 
> > > +       return 0;
> > > +}
> > [..]
> > 
> > Regards,
> > Simon

  reply	other threads:[~2021-11-05  8:23 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-03 15:09 [PATCH 0/6 v4] TPM cleanups and MMIO driver Ilias Apalodimas
2021-11-03 15:09 ` [PATCH 1/6 v4] tpm2: Introduce TIS tpm core Ilias Apalodimas
2021-11-05  2:02   ` Simon Glass
2021-11-05  7:01     ` Ilias Apalodimas
2021-11-05 16:12       ` Simon Glass
2021-11-03 15:09 ` [PATCH 2/6 v4] tpm2: Add a TPMv2 MMIO TIS driver Ilias Apalodimas
2021-11-05  2:02   ` Simon Glass
2021-11-05  8:17     ` Ilias Apalodimas
2021-11-05  8:23       ` Ilias Apalodimas [this message]
2021-11-05 16:12         ` Simon Glass
2021-11-03 15:09 ` [PATCH 3/6 v4] tpm: Use the new API on tpm2 spi driver Ilias Apalodimas
2021-11-05  2:02   ` Simon Glass
2021-11-03 15:09 ` [PATCH 4/6 v4] configs: Enable tpmv2 mmio on qemu for arm/arm64 Ilias Apalodimas
2021-11-05  2:02   ` Simon Glass
2021-11-03 15:09 ` [PATCH 5/6 v4] doc: qemu: Add instructions for swtpm usage Ilias Apalodimas
2021-11-05  2:02   ` Simon Glass
2021-11-03 15:09 ` [PATCH 6/6 v4] MAINTAINERS: Add entry for TPM drivers Ilias Apalodimas

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