From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62C2DC433EF for ; Thu, 17 Feb 2022 09:34:53 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id ECC1B8339D; Thu, 17 Feb 2022 10:34:50 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 9250B83881; Thu, 17 Feb 2022 10:34:48 +0100 (CET) Received: from Atcsqr.andestech.com (exmail.andestech.com [60.248.187.195]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id BA01682A59 for ; Thu, 17 Feb 2022 10:34:43 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 21H9YaDj018465; Thu, 17 Feb 2022 17:34:36 +0800 (+08) (envelope-from ycliang@andestech.com) Received: from ubuntu01 (10.0.12.75) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Thu, 17 Feb 2022 17:34:34 +0800 Date: Thu, 17 Feb 2022 09:34:25 +0000 From: Leo Liang To: Khem Raj CC: , Rick Chen Subject: Re: [PATCH] riscv: fix build with binutils 2.38 Message-ID: References: <20220214052845.40610-1-raj.khem@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20220214052845.40610-1-raj.khem@gmail.com> User-Agent: Mutt/2.0.5 (2021-01-21) X-Originating-IP: [10.0.12.75] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 21H9YaDj018465 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Hi Khem, On Sun, Feb 13, 2022 at 09:28:45PM -0800, Khem Raj wrote: > From version 2.38, binutils default to ISA spec version 20191213. This > means that the csr read/write (csrr*/csrw*) instructions and fence.i > instruction has separated from the `I` extension, become two standalone > extensions: Zicsr and Zifencei. > > The fix is to specify those extensions explicitly in -march. However as > older binutils version do not support this, we first need to detect > that. > > Fixes > arch/riscv/lib/cache.c: Assembler messages: > arch/riscv/lib/cache.c:12: Error: unrecognized opcode `fence.i' > > Signed-off-by: Khem Raj > Cc: Rick Chen > Cc: Leo Thanks for sending the patch. As Alexandre has already sent out a patch to solve this problem first, (https://patchwork.ozlabs.org/project/uboot/patch/20220128134713.2322800-1-alexandre.ghiti@canonical.com/) we'd go with this patch and we welcome your future patches to improve RISC-V U-Boot. Best regards, Leo