From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0887DC43334 for ; Sat, 16 Jul 2022 13:24:38 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9D105810E8; Sat, 16 Jul 2022 15:24:36 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gerhold.net Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gerhold.net header.i=@gerhold.net header.b="ciAyI7wJ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8477281118; Sat, 16 Jul 2022 15:24:34 +0200 (CEST) Received: from mo4-p01-ob.smtp.rzone.de (mo4-p01-ob.smtp.rzone.de [85.215.255.53]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id CC50180C75 for ; Sat, 16 Jul 2022 15:24:30 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gerhold.net Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=stephan@gerhold.net DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1657977863; s=strato-dkim-0002; d=gerhold.net; h=In-Reply-To:References:Message-ID:Subject:Cc:To:From:Date:Cc:Date: From:Subject:Sender; bh=hOwIea62nUyLqrlKcmkfk3FVUEVCkQpOgCzHBdXJ9OY=; b=ciAyI7wJkh/mvyPEOr1YQne0yI1vYnuG8hS8o3Kk+mLQwRmFORDkPvifWhJU9GR/z0 mLveVRiW+Fr9GfMt55VCaKF9GJZN3ceHDl7+qx7Amyeiq8M06IqKBGvd+xsOIgeGCi2o cz9GF3DNBpi3ZBXVgjc1T72nW/Xgm+zSdXbgWRXM6tQkIUBAzdDMMqZImFtsaH7yGITM rYhM315Ydg08W2iEO3VuVxOsgEwlVNJWhkuHRuNMkjgFpA0/pL73J/hzxdx7nCJyanzU Qxe6LZ3HC2GbfJjP7DPG5VZWGafcjjlNM2BmTB/WcJthI/89yGgdQuDcC67xP94QNC1x UQMw== Authentication-Results: strato.com; dkim=none X-RZG-AUTH: ":P3gBZUipdd93FF5ZZvYFPugejmSTVR2nRPhVOQ/OcYgojyw4j34+u267FZF9PwpcNKLVrKw5+aY=" X-RZG-CLASS-ID: mo00 Received: from gerhold.net by smtp.strato.de (RZmta 47.47.0 AUTH) with ESMTPSA id he04d0y6GDOMCGb (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Sat, 16 Jul 2022 15:24:22 +0200 (CEST) Date: Sat, 16 Jul 2022 15:24:13 +0200 From: Stephan Gerhold To: Sumit Garg Cc: u-boot@lists.denx.de, robert.marko@sartura.hr, luka.kovacic@sartura.hr, luka.perkov@sartura.hr, rfried.dev@gmail.com, dsankouski@gmail.com, sjg@chromium.org, trini@konsulko.com, vinod.koul@linaro.org, nicolas.dechesne@linaro.org, mworsfold@impinj.com, daniel.thompson@linaro.org, pbrobinson@gmail.com, Alexey Minnekhanov Subject: Re: [PATCH] arm: dts: qcom: Sync pinctrl DT nodes with Linux bindings Message-ID: References: <20220714073337.2298978-1-sumit.garg@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Fri, Jul 15, 2022 at 03:21:45PM +0530, Sumit Garg wrote: > On Thu, 14 Jul 2022 at 23:45, Stephan Gerhold wrote: > > On Thu, Jul 14, 2022 at 01:03:37PM +0530, Sumit Garg wrote: > > > This is based on top of mine other patch-set [1]. Although, I have > > > tested it on db845c and qcs404-evb but I would like other board > > > maintainers to test it as well. > > > > > > [1] https://patchwork.ozlabs.org/project/uboot/list/?series=309135 > > > > If possible I would prefer to introduce the QCS404 platform with a clean > > DT (i.e. qcs404.dtsi imported from the Linux kernel, instead of adding > > the custom qcs404-evb.dts and then cleaning it up). This patch would > > need to come before the QCS404 addition then. > > > > Sorry but it's unfair to block new SoCs/boards support until all the > existing mess around DT is cleaned up in Qcom specific u-boot drivers. > This patch is a good example to demonstrate that all corresponding > boards DT need to be fixed as well which requires testing. And I don't > even have access to starqltechn, ipq4019 based board and db820c. > Sorry, I thought this is the only patch you need to use the Linux QCS404 DT as-is (maybe I misunderstood). I'm not expecting that you clean up all existing boards first of course. :) I just thought it would be nice to start clean for QCS404 immediately if this is the only patch you need. This patch looks simple enough for me if we test it on a couple of boards, the pinctrl setup is fairly similar across all of them. However, I wrote this before the comments with the additional "reg"s below. If we need to add handling for that as well the patch will need to become a bit larger of course, maybe too large to prepend it to your QCS404 series. > AFAIK, it's not a requirement yet but a recommendation at this stage > to import DT directly from Linux kernel and work with it. But I would > be very happy to work in this direction to make Qcom SoCs/boards DT > compliant. So I would request the merge of new boards support and then > we can follow up with patches like this one. > Thanks! I'm not familiar with the requirements so I'll leave this up to Tom to decide. :) > [...] > > > diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts > > > index 4f0ae20bdb..09687e1fd3 100644 > > > --- a/arch/arm/dts/qcs404-evb.dts > > > +++ b/arch/arm/dts/qcs404-evb.dts > > > @@ -38,7 +38,7 @@ > > > compatible = "simple-bus"; > > > > > > pinctrl_north@1300000 { > > > - compatible = "qcom,tlmm-qcs404"; > > > + compatible = "qcom,qcs404-pinctrl"; > > > reg = <0x1300000 0x200000>; > > > > The Linux node still looks a bit different (from qcs404.dtsi): > > > > tlmm: pinctrl@1000000 { > > compatible = "qcom,qcs404-pinctrl"; > > reg = <0x01000000 0x200000>, > > <0x01300000 0x200000>, > > <0x07b00000 0x200000>; > > reg-names = "south", "north", "east"; > > > > I guess we'll need to fetch the "north" region from it (if that's what > > you need)? > > This is another example of a shortcut already used by the u-boot > pinctrl driver (arch/arm/mach-snapdragon/pinctrl-snapdragon.c). You > can find another user here (arch/arm/dts/sdm845.dtsi). So the pinctrl > drivers need to be converted to a format supported by Linux kernel. > Also, the pinctrl drivers need to be moved to "drivers/pinctrl/qcom/" > dir instead. > Right. FYI, there is started work on one possible solution for this here: https://github.com/minlexx/u-boot-2nd/commits/660 Basically Alexey (now in Cc) and Michael ported parts of the Linux pinctrl-msm driver to U-Boot, in a way that you can mostly just copy the platform specific definitions as-is. The additional memory regions are handled correctly there AFAICT. The code size overall is quite a bit higher of course, but I think this is not a problem for any of the Qualcomm boards in U-Boot. The ease of porting and flexibility should outweigh the cost here, I think. Thanks, Stephan