From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17636E77188 for ; Thu, 16 Jan 2025 07:22:24 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 800A68033D; Thu, 16 Jan 2025 08:22:23 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id BC9CA80658; Thu, 16 Jan 2025 08:22:22 +0100 (CET) Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 433D980214 for ; Thu, 16 Jan 2025 08:22:20 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (ATCPCS34.andestech.com [10.0.1.134]) by Atcsqr.andestech.com with ESMTPS id 50G7MC3t025975 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=OK); Thu, 16 Jan 2025 15:22:12 +0800 (+08) (envelope-from ycliang@andestech.com) Received: from swlinux02 (10.0.15.183) by ATCPCS34.andestech.com (10.0.1.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 16 Jan 2025 15:22:12 +0800 Date: Thu, 16 Jan 2025 15:22:08 +0800 From: Leo Liang To: Mayuresh Chitale CC: , Rick Chen , Tom Rini , Conor Dooley , "Heinrich Schuchardt" Subject: Re: [PATCH v1 2/2] riscv: Fallback to riscv,isa Message-ID: References: <20250106130405.220369-1-mchitale@ventanamicro.com> <20250106130405.220369-3-mchitale@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20250106130405.220369-3-mchitale@ventanamicro.com> User-Agent: Mutt/2.2.10 (e0e92c31) (2023-03-25) X-Originating-IP: [10.0.15.183] X-ClientProxiedBy: ATCPCS33.andestech.com (10.0.1.100) To ATCPCS34.andestech.com (10.0.1.134) X-DKIM-Results: atcpcs34.andestech.com; dkim=none; X-DNSRBL: X-MAIL: Atcsqr.andestech.com 50G7MC3t025975 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Mon, Jan 06, 2025 at 01:04:05PM +0000, Mayuresh Chitale wrote: > Update the cpu probing to fallback to "riscv,isa" property if > "riscv,isa-extensions" is not available and modify the riscv CMO code > to use the block size that was probed during cpu setup. > > Signed-off-by: Mayuresh Chitale > --- > arch/riscv/cpu/cpu.c | 71 +++++++++++++----------------------------- > arch/riscv/lib/cache.c | 26 +++------------- > 2 files changed, 25 insertions(+), 72 deletions(-) Reviewed-by: Leo Yu-Chi Liang