* [PATCH 1/1] riscv: qemu: imply CONFIG_RNG_RISCV_ZKR
@ 2025-03-02 8:50 Heinrich Schuchardt
2025-03-06 3:14 ` Leo Liang
0 siblings, 1 reply; 2+ messages in thread
From: Heinrich Schuchardt @ 2025-03-02 8:50 UTC (permalink / raw)
To: Bin Meng; +Cc: Leo Yu-Chi Liang, Rick Chen, u-boot, Heinrich Schuchardt
The zkr ISA extension can be used to generate random numbers. Since RVA22
zkr is an optional ISA extension. It can be emulated by QEMU. Our RNG
driver detects if the extension is usable during driver binding. Let's
enable it by default on QEMU.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
---
board/emulation/qemu-riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig
index 012ac14a123..134dbfd7151 100644
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -62,6 +62,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
imply VIDEO_SIMPLE
imply PCIE_ECAM_GENERIC
imply DM_RNG
+ imply RNG_RISCV_ZKR
imply DM_RTC
imply RTC_GOLDFISH
imply SCSI
--
2.48.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 1/1] riscv: qemu: imply CONFIG_RNG_RISCV_ZKR
2025-03-02 8:50 [PATCH 1/1] riscv: qemu: imply CONFIG_RNG_RISCV_ZKR Heinrich Schuchardt
@ 2025-03-06 3:14 ` Leo Liang
0 siblings, 0 replies; 2+ messages in thread
From: Leo Liang @ 2025-03-06 3:14 UTC (permalink / raw)
To: Heinrich Schuchardt; +Cc: Bin Meng, Rick Chen, u-boot
On Sun, Mar 02, 2025 at 09:50:17AM +0100, Heinrich Schuchardt wrote:
> The zkr ISA extension can be used to generate random numbers. Since RVA22
> zkr is an optional ISA extension. It can be emulated by QEMU. Our RNG
> driver detects if the extension is usable during driver binding. Let's
> enable it by default on QEMU.
>
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> ---
> board/emulation/qemu-riscv/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2025-03-02 8:50 [PATCH 1/1] riscv: qemu: imply CONFIG_RNG_RISCV_ZKR Heinrich Schuchardt
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