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Date: Mon, 24 Jul 2023 02:06:50 +0000
From: Leo Liang <ycliang@andestech.com>
To: Minda Chen <minda.chen@starfivetech.com>
CC: Joe Hershberger <joe.hershberger@ni.com>, Ramon Fried
 <rfried.dev@gmail.com>, Rick Chen <rick@andestech.com>,
 <u-boot@lists.denx.de>, Mason Huo <mason.huo@starfivetech.com>
Subject: Re: [PATCH v2 2/4] net: rtl8169: Fix DMA minimal aligned compile
 warning in RISC-V
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References: <20230720113729.9798-1-minda.chen@starfivetech.com>
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On Thu, Jul 20, 2023 at 07:37:27PM +0800, Minda Chen wrote:
> For RISC-V architeture, hardware maintain the dcache coherency.
> Software do not flush the cache. So even cache-line size larger
> than descriptor size, driver can work.
> 
> Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
> ---
>  drivers/net/rtl8169.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>