From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 087F7C0015E for ; Wed, 26 Jul 2023 17:08:41 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 62E3D86870; Wed, 26 Jul 2023 19:08:15 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=dolcini.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 61CCA867E2; Wed, 26 Jul 2023 19:07:53 +0200 (CEST) Received: from mail11.truemail.it (mail11.truemail.it [IPv6:2001:4b7e:0:8::81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0C379860A6 for ; Wed, 26 Jul 2023 19:07:51 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=dolcini.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=francesco@dolcini.it Received: from francesco-nb.int.toradex.com (31-10-206-125.static.upc.ch [31.10.206.125]) by mail11.truemail.it (Postfix) with ESMTPA id 047482078C; Wed, 26 Jul 2023 15:29:46 +0200 (CEST) Date: Wed, 26 Jul 2023 15:29:42 +0200 From: Francesco Dolcini To: Nishanth Menon Cc: Francesco Dolcini , Tom Rini , Neha Malcom Francis , Bryan Brattlof , Praneeth Bajjuri , Andrew Davis , Robert Nelson , Vignesh R , u-boot@lists.denx.de Subject: Re: [PATCH 3/6] board: ti: am62x: Add basic initialization for usb voltage, 32k crystal, debounce Message-ID: References: <20230725185253.2123433-1-nm@ti.com> <20230725185253.2123433-4-nm@ti.com> <20230725212504.GH3630934@bill-the-cat> <20230725213755.kc6qcvmkmt2yzzqz@perfected> <20230725214210.GL3630934@bill-the-cat> <20230725220328.fruxsldln7o5geil@tassel> <20230726111019.gotprceqsrmpwgyg@stopwatch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230726111019.gotprceqsrmpwgyg@stopwatch> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Wed, Jul 26, 2023 at 06:10:19AM -0500, Nishanth Menon wrote: > On 00:35-20230726, Francesco Dolcini wrote: > > However to my understanding this would need to have the corresponding > > DEBOUNCE_SEL register written on the pad configuration, and by default it's 0. > > > > What's the use case for this debounce configuration you have here? > > TRM was a bit of a crap (internal ticket was filed to improve), but long > story short: > * bootloader configures delays per index > * in the pinmux configuration, we pick which index to use for the pin Thanks, this clarify it. Francesco