From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77433EB64DD for ; Thu, 10 Aug 2023 02:53:55 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6BF1F862F1; Thu, 10 Aug 2023 04:53:53 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 105E786384; Thu, 10 Aug 2023 04:53:53 +0200 (CEST) Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 16A638627C for ; Thu, 10 Aug 2023 04:53:49 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 37A2rduZ061769; Thu, 10 Aug 2023 10:53:39 +0800 (+08) (envelope-from ycliang@andestech.com) Received: from swlinux02 (10.0.15.183) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Thu, 10 Aug 2023 10:53:38 +0800 Date: Thu, 10 Aug 2023 10:53:34 +0800 From: Leo Liang To: Shengyu Qu CC: , , , , , Subject: Re: [PATCH v4 2/3] riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation Message-ID: References: <20230809131133.28646-1-wiagn233@outlook.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.2.10 (e0e92c31) (2023-03-25) X-Originating-IP: [10.0.15.183] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 37A2rduZ061769 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Wed, Aug 09, 2023 at 09:11:32PM +0800, Shengyu Qu wrote: > Add the actual support code for SPL_ZERO_MEM_BEFORE_USE and remove > existing Starfive JH7110's L2 LIM clean code, since existing code has > following issues: > 1. Each hart (in the middle of a function call) overwriting its own > stack and other harts' stacks. > (data-race and data-corruption) > 2. Lottery winner hart can be doing "board_init_f_init_reserve", > while other harts are in the middle of zeroing L2 LIM. > (data-race) > > Signed-off-by: Bo Gan > Signed-off-by: Shengyu Qu > --- > Changes since v2: > - Fix typo (ZERO_MEM_BEFORE_USE to SPL_ZERO_MEM_BEFORE_USE) > Changes since v3: > - Revert v3's fix since original implementation is actually right > --- > arch/riscv/cpu/jh7110/spl.c | 25 ------------------------- > arch/riscv/cpu/start.S | 12 ++++++++++++ > common/init/board_init.c | 3 +++ > 3 files changed, 15 insertions(+), 25 deletions(-) Reviewed-by: Leo Yu-Chi Liang