From: Leo Liang <ycliang@andestech.com>
To: Torsten Duwe <duwe@lst.de>
Cc: Rick Chen <rick@andestech.com>,
Yanhong Wang <yanhong.wang@starfivetech.com>,
Xingyu Wu <xingyu.wu@starfivetech.com>,
Mason Huo <mason.huo@starfivetech.com>,
Hal Feng <hal.feng@starfivetech.com>,
Simon Glass <sjg@chromium.org>, <u-boot@lists.denx.de>
Subject: Re: [PATCH 1/2] riscv: allow riscv timer to be instantiated via device tree
Date: Mon, 4 Sep 2023 13:57:08 +0800 [thread overview]
Message-ID: <ZPVxtChyM1i3ypTy@swlinux02> (raw)
In-Reply-To: <20230814160528.4979467373@verein.lst.de>
On Mon, Aug 14, 2023 at 06:05:28PM +0200, Torsten Duwe wrote:
> For the architectural timer on riscv, there already is a defined
> device tree binding[1]. Allow timer instances to be created from
> device tree matches, but for now retain the old mechanism, which
> registers the timer biggy-back with the CPU.
>
> [1] linux/Documentation/devicetree/bindings/timer/riscv,timer.yaml
>
> Signed-off-by: Torsten Duwe <duwe@suse.de>
> ---
> drivers/timer/riscv_timer.c | 28 ++++++++++++++++++++++++++--
> 1 file changed, 26 insertions(+), 2 deletions(-)
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
next prev parent reply other threads:[~2023-09-04 5:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-14 16:04 [PATCH 0/2] riscv: jh7110: visionfive2: fix u-boot crash due to missing timer Torsten Duwe
2023-08-14 16:05 ` [PATCH 1/2] riscv: allow riscv timer to be instantiated via device tree Torsten Duwe
2023-09-04 5:57 ` Leo Liang [this message]
2023-08-14 16:05 ` [PATCH 2/2] riscv: jh7110: enable riscv,timer in the " Torsten Duwe
2023-09-04 5:58 ` Leo Liang
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