RE: [PATCH v2 3/3] timer: riscv_aclint_timer: add timer_get_boot_us for BOOTSTAGE

Chanho Park
2023-09-04T07:42:40Z

Hi,

> -----Original Message-----
> From: Leo Liang <ycliang@andestech.com>
> Sent: Monday, September 4, 2023 4:02 PM
> To: Chanho Park <chanho61.park@samsung.com>
> Cc: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>; u-
> boot@lists.denx.de
> Subject: Re: [PATCH v2 3/3] timer: riscv_aclint_timer: add
> timer_get_boot_us for BOOTSTAGE
>
> Hi Chanho,
>
> On Mon, Aug 28, 2023 at 06:49:38PM +0900, Chanho Park wrote:
> > timer_get_boot_us function is required to record the boot stages as
> > us-based timestamp.
> >
> > Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> > ---
> > drivers/timer/riscv_aclint_timer.c | 22 ++++++++++++++++++++++
> > 1 file changed, 22 insertions(+)
> >
> > diff --git a/drivers/timer/riscv_aclint_timer.c
> > b/drivers/timer/riscv_aclint_timer.c
> > index e29d527c8d77..8b67745bb4a2 100644
> > --- a/drivers/timer/riscv_aclint_timer.c
> > +++ b/drivers/timer/riscv_aclint_timer.c
> > @@ -6,6 +6,7 @@
> >
> > #include <common.h>
> > #include <clk.h>
> > +#include <div64.h>
> > #include <dm.h>
> > #include <timer.h>
> > #include <asm/io.h>
> > @@ -44,6 +45,27 @@ u64 notrace timer_early_get_count(void) } #endif
> >
> > +#if CONFIG_IS_ENABLED(RISCV_MMODE) && CONFIG_IS_ENABLED(BOOTSTAGE)
> > +ulong timer_get_boot_us(void) {
> > + int ret;
> > + u64 ticks = 0;
> > + u32 rate;
> > +
> > + ret = dm_timer_init();
> > + if (!ret) {
> > + rate = timer_get_rate(gd->timer);
> > + timer_get_count(gd->timer, &ticks);
> > + } else {
> > + rate = RISCV_MMODE_TIMER_FREQ;
> > + ticks = readq((void __iomem
> *)MTIME_REG(RISCV_MMODE_TIMERBASE,
> > +
RISCV_MMODE_TIMEROFF));
> > + }
> > +
> > + return lldiv(ticks * 1001, (rate / 1000));
>
> Why is this dividend 1001 ?

It's a typo. I'll correct when I send v2.

Best Regards,
Chanho Park