* [PATCH v2 0/2] risc-v: implement DBCN based debug console
@ 2023-09-04 11:24 ` Heinrich Schuchardt
2023-09-04 11:24 ` [PATCH v2 1/2] risc-v: implement DBCN write byte Heinrich Schuchardt
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Heinrich Schuchardt @ 2023-09-04 11:24 UTC (permalink / raw)
To: Rick Chen, Leo
Cc: Bin Meng, Anup Patel, Chanho Park, u-boot, Heinrich Schuchardt
Currently we only offer an SBI based debug UART for SBI v0.1.
With OpenSBI 1.3 the Debug Console Extension (DBCN) has become available.
This allows us to implement a debug UART in a device independent manor.
v2:
In the driver check that we are in S-mode.
Heinrich Schuchardt (2):
risc-v: implement DBCN write byte
risc-v: implement DBCN based debug console
arch/riscv/include/asm/sbi.h | 1 +
arch/riscv/lib/sbi.c | 16 ++++++++++++++++
drivers/serial/Kconfig | 5 ++++-
drivers/serial/serial_sbi.c | 20 ++++++++++++++++++++
4 files changed, 41 insertions(+), 1 deletion(-)
--
2.40.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 1/2] risc-v: implement DBCN write byte
2023-09-04 11:24 ` [PATCH v2 0/2] risc-v: implement DBCN based debug console Heinrich Schuchardt
@ 2023-09-04 11:24 ` Heinrich Schuchardt
2023-09-04 11:24 ` [PATCH v2 2/2] risc-v: implement DBCN based debug console Heinrich Schuchardt
2023-09-04 23:42 ` [PATCH v2 0/2] " Chanho Park
2 siblings, 0 replies; 5+ messages in thread
From: Heinrich Schuchardt @ 2023-09-04 11:24 UTC (permalink / raw)
To: Rick Chen, Leo
Cc: Bin Meng, Anup Patel, Chanho Park, u-boot, Heinrich Schuchardt
The DBCN extension provides a Console Write Byte call.
Implement function sbi_dbcn_write_byte to invoke it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
---
v2:
no change
---
arch/riscv/include/asm/sbi.h | 1 +
arch/riscv/lib/sbi.c | 16 ++++++++++++++++
2 files changed, 17 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 009a26885c..bf4c9af622 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -170,5 +170,6 @@ int sbi_get_mvendorid(long *mvendorid);
int sbi_get_marchid(long *marchid);
int sbi_get_mimpid(long *mimpid);
void sbi_srst_reset(unsigned long type, unsigned long reason);
+int sbi_dbcn_write_byte(unsigned char ch);
#endif
diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
index 8724e3a460..55a3bc3b5c 100644
--- a/arch/riscv/lib/sbi.c
+++ b/arch/riscv/lib/sbi.c
@@ -204,6 +204,22 @@ void sbi_srst_reset(unsigned long type, unsigned long reason)
0, 0, 0, 0);
}
+/**
+ * sbi_dbcn_write_byte() - write byte to debug console
+ *
+ * @ch: byte to be written
+ * Return: SBI error code (SBI_SUCCESS = 0 on success)
+ */
+int sbi_dbcn_write_byte(unsigned char ch)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_DBCN,
+ SBI_EXT_DBCN_CONSOLE_WRITE_BYTE,
+ ch, 0, 0, 0, 0, 0);
+ return ret.error;
+}
+
#ifdef CONFIG_SBI_V01
/**
--
2.40.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] risc-v: implement DBCN based debug console
2023-09-04 11:24 ` [PATCH v2 0/2] risc-v: implement DBCN based debug console Heinrich Schuchardt
2023-09-04 11:24 ` [PATCH v2 1/2] risc-v: implement DBCN write byte Heinrich Schuchardt
@ 2023-09-04 11:24 ` Heinrich Schuchardt
2023-09-05 2:39 ` Leo Liang
2023-09-04 23:42 ` [PATCH v2 0/2] " Chanho Park
2 siblings, 1 reply; 5+ messages in thread
From: Heinrich Schuchardt @ 2023-09-04 11:24 UTC (permalink / raw)
To: Rick Chen, Leo
Cc: Bin Meng, Anup Patel, Chanho Park, u-boot, Heinrich Schuchardt
Use the DBCN SBI extension to implement a debug console.
Make it the default for S-mode RISC-V.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
---
v2:
check that we are in S-mode
---
drivers/serial/Kconfig | 5 ++++-
drivers/serial/serial_sbi.c | 20 ++++++++++++++++++++
2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 7ca42df6a7..fb108f0189 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -218,6 +218,7 @@ config DEBUG_UART
choice
prompt "Select which UART will provide the debug UART"
depends on DEBUG_UART
+ default DEBUG_SBI_CONSOLE if RISCV_SMODE
default DEBUG_UART_NS16550
config DEBUG_UART_ALTERA_JTAGUART
@@ -289,11 +290,13 @@ config DEBUG_EFI_CONSOLE
config DEBUG_SBI_CONSOLE
bool "SBI"
- depends on SBI_V01
+ depends on RISCV_SMODE
help
Select this to enable a debug console which calls back to SBI to
output to the console. This can be useful for early debugging of
U-Boot when running on top of SBI (Supervisor Binary Interface).
+ This implementation of the debug UART is not available while in
+ M-mode (e.g. during SPL).
config DEBUG_UART_S5P
bool "Samsung S5P"
diff --git a/drivers/serial/serial_sbi.c b/drivers/serial/serial_sbi.c
index b9f35ed36e..a51a96c1ef 100644
--- a/drivers/serial/serial_sbi.c
+++ b/drivers/serial/serial_sbi.c
@@ -3,6 +3,8 @@
#include <debug_uart.h>
#include <asm/sbi.h>
+#ifdef CONFIG_SBI_V01
+
static inline void _debug_uart_init(void)
{
}
@@ -13,4 +15,22 @@ static inline void _debug_uart_putc(int c)
sbi_console_putchar(c);
}
+#else
+
+static int sbi_dbcn_available;
+
+static inline void _debug_uart_init(void)
+{
+ if (CONFIG_IS_ENABLED(RISCV_SMODE))
+ sbi_dbcn_available = sbi_probe_extension(SBI_EXT_DBCN);
+}
+
+static inline void _debug_uart_putc(int ch)
+{
+ if (CONFIG_IS_ENABLED(RISCV_SMODE) && sbi_dbcn_available)
+ sbi_dbcn_write_byte(ch);
+}
+
+#endif
+
DEBUG_UART_FUNCS
--
2.40.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* RE: [PATCH v2 0/2] risc-v: implement DBCN based debug console
2023-09-04 11:24 ` [PATCH v2 0/2] risc-v: implement DBCN based debug console Heinrich Schuchardt
2023-09-04 11:24 ` [PATCH v2 1/2] risc-v: implement DBCN write byte Heinrich Schuchardt
2023-09-04 11:24 ` [PATCH v2 2/2] risc-v: implement DBCN based debug console Heinrich Schuchardt
@ 2023-09-04 23:42 ` Chanho Park
2 siblings, 0 replies; 5+ messages in thread
From: Chanho Park @ 2023-09-04 23:42 UTC (permalink / raw)
To: 'Heinrich Schuchardt', 'Rick Chen', 'Leo'
Cc: 'Bin Meng', 'Anup Patel', u-boot
Hi,
> -----Original Message-----
> From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> Sent: Monday, September 4, 2023 8:24 PM
> To: Rick Chen <rick@andestech.com>; Leo <ycliang@andestech.com>
> Cc: Bin Meng <bmeng.cn@gmail.com>; Anup Patel <apatel@ventanamicro.com>;
> Chanho Park <chanho61.park@samsung.com>; u-boot@lists.denx.de; Heinrich
> Schuchardt <heinrich.schuchardt@canonical.com>
> Subject: [PATCH v2 0/2] risc-v: implement DBCN based debug console
>
> Currently we only offer an SBI based debug UART for SBI v0.1.
> With OpenSBI 1.3 the Debug Console Extension (DBCN) has become available.
> This allows us to implement a debug UART in a device independent manor.
>
> v2:
> In the driver check that we are in S-mode.
Thanks for the update. I've tested both patches on my VisionFive2 board.
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Chanho Park <chanho61.park@samsung.com>
Best Regards,
Chanho Park
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 2/2] risc-v: implement DBCN based debug console
2023-09-04 11:24 ` [PATCH v2 2/2] risc-v: implement DBCN based debug console Heinrich Schuchardt
@ 2023-09-05 2:39 ` Leo Liang
0 siblings, 0 replies; 5+ messages in thread
From: Leo Liang @ 2023-09-05 2:39 UTC (permalink / raw)
To: Heinrich Schuchardt; +Cc: Rick Chen, Bin Meng, Anup Patel, Chanho Park, u-boot
On Mon, Sep 04, 2023 at 01:24:04PM +0200, Heinrich Schuchardt wrote:
> Use the DBCN SBI extension to implement a debug console.
> Make it the default for S-mode RISC-V.
>
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> ---
> v2:
> check that we are in S-mode
> ---
> drivers/serial/Kconfig | 5 ++++-
> drivers/serial/serial_sbi.c | 20 ++++++++++++++++++++
> 2 files changed, 24 insertions(+), 1 deletion(-)
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
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2023-09-04 11:24 ` [PATCH v2 0/2] risc-v: implement DBCN based debug console Heinrich Schuchardt
2023-09-04 11:24 ` [PATCH v2 1/2] risc-v: implement DBCN write byte Heinrich Schuchardt
2023-09-04 11:24 ` [PATCH v2 2/2] risc-v: implement DBCN based debug console Heinrich Schuchardt
2023-09-05 2:39 ` Leo Liang
2023-09-04 23:42 ` [PATCH v2 0/2] " Chanho Park
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