[PATCH V2 0/7] riscv: spl: OpenSBI OS boot mode

[PATCH V2 0/7] riscv: spl: OpenSBI OS boot mode

[Randolph]

Introduce a shortcut boot mode for RISC-V. 

As we know, in ARM architecture has the Falcon mode to do the shortcut
boot to the Linux kernel. (by enabling CONFIG_SPL_OS_BOOT)
ARM Falcon mode boot flow would be as follows:
u-boot SPL -> Linux kernel

But for RISC-V, OpenSBI is required to allows the supervisor to execute
some privileged operations.
The RISC-V Normal boot flow as follows:
u-boot SPL -> OpenSBI -> u-boot proper -> Linux kernel

Quoting the same ideas as ARM's Falcon mode,
OpenSBI OS boot flow as follows:
u-boot SPL -> OpenSBI -> Linux kernel

An important part of OpenSBI OS boot mode is to prepare the device tree. 
A normal U-Boot does FDT fixups when booting Linux. 
For OpenSBI OS boot mode, Linux boots directly from SPL, 
skipping the normal U-Boot. 
The device tree has to be prepared in advance.
The device tree in memory is the one needed for OpenSBI OS boot mode.

The Linux kernel image will also need to be provided for the generation
of the FIT file.

Changes in v2:
- change the order from Patch 3/7 in V1 to Patch 1/7 in V2
- merge the OPENSBI_OS_BOOT related logic into binman.dtsi
- change by suggestions 
- add a new patch to delete the output file when make clean.

Randolph (7):
  spl: riscv: opensbi: change the default os_type as varible
  riscv: kconfig: introduce SPL_LOAD_FIT_OPENSBI_OS_BOOT symbol
  riscv: dts: binman: add condition for opensbi os boot
  Makefile: delete file *.itb when make clean
  spl: riscv: add os type for next booting stage
  andes: config: add riscv falcon mode for ae350 platform
  riscv: spl: andes: Move the DTB in front of kernel

 Makefile                                |  2 +-
 arch/riscv/Kconfig                      |  8 ++++
 arch/riscv/dts/binman.dtsi              | 24 ++++++++++
 board/AndesTech/ae350/ae350.c           | 25 ++++++++++
 common/spl/spl_fit.c                    |  3 +-
 common/spl/spl_opensbi.c                | 31 +++++++++----
 configs/ae350_rv32_falcon_defconfig     | 60 ++++++++++++++++++++++++
 configs/ae350_rv32_falcon_xip_defconfig | 61 +++++++++++++++++++++++++
 configs/ae350_rv64_falcon_defconfig     | 60 ++++++++++++++++++++++++
 configs/ae350_rv64_falcon_xip_defconfig | 61 +++++++++++++++++++++++++
 10 files changed, 323 insertions(+), 12 deletions(-)
 create mode 100644 configs/ae350_rv32_falcon_defconfig
 create mode 100644 configs/ae350_rv32_falcon_xip_defconfig
 create mode 100644 configs/ae350_rv64_falcon_defconfig
 create mode 100644 configs/ae350_rv64_falcon_xip_defconfig

-- 
2.34.1

[PATCH V2 1/7] spl: riscv: opensbi: change the default os_type as varible

[Randolph]

In order to introduce the Opensbi OS boot mode, the next stage boot
image of OpenSBI should be configurable.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
 common/spl/spl_opensbi.c | 26 ++++++++++++++++----------
 1 file changed, 16 insertions(+), 10 deletions(-)

diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c
index 0df611623a..6583b31953 100644
--- a/common/spl/spl_opensbi.c
+++ b/common/spl/spl_opensbi.c
@@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct fw_dynamic_info opensbi_info;
 
-static int spl_opensbi_find_uboot_node(void *blob, int *uboot_node)
+static int spl_opensbi_find_os_node(void *blob, int *uboot_node, int os_type)
 {
 	int fit_images_node, node;
 	const char *fit_os;
@@ -35,7 +35,7 @@ static int spl_opensbi_find_uboot_node(void *blob, int *uboot_node)
 		if (!fit_os)
 			continue;
 
-		if (genimg_get_os_id(fit_os) == IH_OS_U_BOOT) {
+		if (genimg_get_os_id(fit_os) == os_type) {
 			*uboot_node = node;
 			return 0;
 		}
@@ -46,8 +46,9 @@ static int spl_opensbi_find_uboot_node(void *blob, int *uboot_node)
 
 void __noreturn spl_invoke_opensbi(struct spl_image_info *spl_image)
 {
-	int ret, uboot_node;
-	ulong uboot_entry;
+	int ret, os_node;
+	ulong os_entry;
+	int os_type;
 	typedef void __noreturn (*opensbi_entry_t)(ulong hartid, ulong dtb, ulong info);
 	opensbi_entry_t opensbi_entry;
 
@@ -56,22 +57,27 @@ void __noreturn spl_invoke_opensbi(struct spl_image_info *spl_image)
 		hang();
 	}
 
-	/* Find U-Boot image in /fit-images */
-	ret = spl_opensbi_find_uboot_node(spl_image->fdt_addr, &uboot_node);
+	/*
+	 * Find next os image in /fit-images
+	 * The next os image default is u-boot proper
+	 */
+	os_type = IH_OS_U_BOOT;
+	ret = spl_opensbi_find_os_node(spl_image->fdt_addr, &os_node, os_type);
 	if (ret) {
-		pr_err("Can't find U-Boot node, %d\n", ret);
+		pr_err("Can't find %s node for opensbi, %d\n",
+		       genimg_get_os_name(os_type), ret);
 		hang();
 	}
 
 	/* Get U-Boot entry point */
-	ret = fit_image_get_entry(spl_image->fdt_addr, uboot_node, &uboot_entry);
+	ret = fit_image_get_entry(spl_image->fdt_addr, os_node, &os_entry);
 	if (ret)
-		ret = fit_image_get_load(spl_image->fdt_addr, uboot_node, &uboot_entry);
+		ret = fit_image_get_load(spl_image->fdt_addr, os_node, &os_entry);
 
 	/* Prepare opensbi_info object */
 	opensbi_info.magic = FW_DYNAMIC_INFO_MAGIC_VALUE;
 	opensbi_info.version = FW_DYNAMIC_INFO_VERSION;
-	opensbi_info.next_addr = uboot_entry;
+	opensbi_info.next_addr = os_entry;
 	opensbi_info.next_mode = FW_DYNAMIC_INFO_NEXT_MODE_S;
 	opensbi_info.options = CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS;
 	opensbi_info.boot_hart = gd->arch.boot_hart;
-- 
2.34.1

[PATCH V2 2/7] riscv: kconfig: introduce SPL_LOAD_FIT_OPENSBI_OS_BOOT symbol

[Randolph]

Introduce common Kconfig symbol for riscv architecture.
This symbol SPL_LOAD_FIT_OPENSBI_OS_BOOT is like falcon mode on ARM,
the Falcon boot is a shortcut boot method for SD/eMMC targets. It
skips the loading the RAM version U-Boot. Instead, it will loads
the FIT image and boots directly to Linux.

When SPL_OPENSBI_OS_BOOT is enabled, linux.itb is created after
compilation instead of the default u-boot.itb. It initialises memory
with the U-Boot SPL at the first stage, just as a normal boot process
does at the beginning. Instead of jumping to the U-Boot proper from
OpenSBI before booting the Linux kernel, the RISC-V falcon mode
process jumps directly to the Linux kernel to gain shorter booting time.

Signed-off-by: Randolph <randolph@andestech.com>
---
 arch/riscv/Kconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 183885ebe7..49b6e1a4d6 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -424,4 +424,12 @@ config TPL_USE_ARCH_MEMSET
 
 endmenu
 
+config SPL_LOAD_FIT_OPENSBI_OS_BOOT
+	bool "Enable SPL (OpenSBI OS boot mode) applying linux from FIT"
+	depends on SPL_LOAD_FIT
+	help
+	  Use fw_dynamic from the FIT image, and u-boot SPL will invoke it directly.
+	  This is a shortcut boot flow, from u-boot SPL -> OpenSBI -> u-boot proper
+	  -> linux to u-boot SPL -> OpenSBI -> linux.
+
 endmenu
-- 
2.34.1

Re: [PATCH V2 2/7] riscv: kconfig: introduce SPL_LOAD_FIT_OPENSBI_OS_BOOT symbol

[Simon Glass]

On Wed, 11 Oct 2023 at 23:42, Randolph <randolph@andestech.com> wrote:
>
> Introduce common Kconfig symbol for riscv architecture.
> This symbol SPL_LOAD_FIT_OPENSBI_OS_BOOT is like falcon mode on ARM,
> the Falcon boot is a shortcut boot method for SD/eMMC targets. It
> skips the loading the RAM version U-Boot. Instead, it will loads
> the FIT image and boots directly to Linux.
>
> When SPL_OPENSBI_OS_BOOT is enabled, linux.itb is created after
> compilation instead of the default u-boot.itb. It initialises memory
> with the U-Boot SPL at the first stage, just as a normal boot process
> does at the beginning. Instead of jumping to the U-Boot proper from
> OpenSBI before booting the Linux kernel, the RISC-V falcon mode
> process jumps directly to the Linux kernel to gain shorter booting time.
>
> Signed-off-by: Randolph <randolph@andestech.com>
> ---
>  arch/riscv/Kconfig | 8 ++++++++
>  1 file changed, 8 insertions(+)
>

Reviewed-by: Simon Glass <sjg@chromium.org>

[PATCH V2 3/7] riscv: dts: binman: add condition for opensbi os boot

[Randolph]

Add condition for OpenSBI OS boot mode, by default it is not enabled.
By default, binman creates the output file u-boot.itb.
If SPL_OPENSBI_OS_BOOT is enabled, linux.itb will be created
after compilation instead of the default u-boot.itb.

Signed-off-by: Randolph <randolph@andestech.com>
---
 arch/riscv/dts/binman.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
index 156cb00971..1a55097d71 100644
--- a/arch/riscv/dts/binman.dtsi
+++ b/arch/riscv/dts/binman.dtsi
@@ -13,7 +13,12 @@
 
 &binman {
 	itb {
+
+#ifndef CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT
 		filename = "u-boot.itb";
+#else
+		filename = "linux.itb";
+#endif
 
 		fit {
 			description = "Configuration to load OpenSBI before U-Boot";
@@ -21,6 +26,7 @@
 			fit,fdt-list = "of-list";
 
 			images {
+#ifndef CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT
 				uboot {
 					description = "U-Boot";
 					type = "standalone";
@@ -33,6 +39,20 @@
 						filename = "u-boot-nodtb.bin";
 					};
 				};
+#else
+				linux {
+					description = "Linux";
+					type = "standalone";
+					os = "Linux";
+					arch = "riscv";
+					compression = "none";
+					load = <CONFIG_TEXT_BASE>;
+
+					linux_blob: blob-ext {
+						filename = "Image";
+					};
+				};
+#endif
 
 				opensbi {
 					description = "OpenSBI fw_dynamic Firmware";
@@ -68,7 +88,11 @@
 #endif
 					description = "NAME";
 					firmware = "opensbi";
+#ifndef CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT
 					loadables = "uboot";
+#else
+					loadables = "linux";
+#endif
 #ifndef CONFIG_OF_BOARD
 					fdt = "fdt-SEQ";
 #endif
-- 
2.34.1

Re: [PATCH V2 3/7] riscv: dts: binman: add condition for opensbi os boot

[Simon Glass]

On Wed, 11 Oct 2023 at 23:43, Randolph <randolph@andestech.com> wrote:
>
> Add condition for OpenSBI OS boot mode, by default it is not enabled.
> By default, binman creates the output file u-boot.itb.
> If SPL_OPENSBI_OS_BOOT is enabled, linux.itb will be created
> after compilation instead of the default u-boot.itb.
>
> Signed-off-by: Randolph <randolph@andestech.com>
> ---
>  arch/riscv/dts/binman.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
>

Reviewed-by: Simon Glass <sjg@chromium.org>

You do have the option of creating two images, so you can support both
boot approaches. Then you would need to do the check at runtime,
somehow.

[PATCH V2 4/7] Makefile: delete file *.itb when make clean

[Randolph]

Delete the output file *.itb

Signed-off-by: Randolph <randolph@andestech.com>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 9d2e31e494..a7aa8c02a0 100644
--- a/Makefile
+++ b/Makefile
@@ -2165,7 +2165,7 @@ CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \
 	       mkimage-out.spl.mkimage mkimage.spl.mkimage imx-boot.map \
 	       itb.fit.fit itb.fit.itb itb.map spl.map mkimage-out.rom.mkimage \
 	       mkimage.rom.mkimage rom.map simple-bin.map simple-bin-spi.map \
-	       idbloader-spi.img lib/efi_loader/helloworld_efi.S
+	       idbloader-spi.img lib/efi_loader/helloworld_efi.S *.itb
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include/generated spl tpl vpl \
-- 
2.34.1

Re: [PATCH V2 4/7] Makefile: delete file *.itb when make clean

[Simon Glass]

On Wed, 11 Oct 2023 at 23:44, Randolph <randolph@andestech.com> wrote:
>
> Delete the output file *.itb
>
> Signed-off-by: Randolph <randolph@andestech.com>
> ---
>  Makefile | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Simon Glass <sjg@chromium.org>

[PATCH V2 5/7] spl: riscv: add os type for next booting stage

[Randolph]

If SPL_LOAD_FIT_OPENSBI_OS_BOOT is enabled, the function
spl_invoke_opensbi should change the target OS type to IH_OS_LINUX.
OpenSBI will load the Linux image as the next boot stage.
The os_takes_devicetree function returns a value of true or false
depending on whether or not SPL_LOAD_FIT_OPENSBI_OS_BOOT is enabled.

Signed-off-by: Randolph <randolph@andestech.com>
---
 common/spl/spl_fit.c     | 3 ++-
 common/spl/spl_opensbi.c | 9 +++++++--
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index ce6b8aa370..e9126f07f7 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -366,7 +366,8 @@ static bool os_takes_devicetree(uint8_t os)
 	case IH_OS_U_BOOT:
 		return true;
 	case IH_OS_LINUX:
-		return IS_ENABLED(CONFIG_SPL_OS_BOOT);
+		return IS_ENABLED(CONFIG_SPL_OS_BOOT) ||
+		       IS_ENABLED(CONFIG_SPL_OPENSBI);
 	default:
 		return false;
 	}
diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c
index 6583b31953..9801d38c0b 100644
--- a/common/spl/spl_opensbi.c
+++ b/common/spl/spl_opensbi.c
@@ -59,9 +59,14 @@ void __noreturn spl_invoke_opensbi(struct spl_image_info *spl_image)
 
 	/*
 	 * Find next os image in /fit-images
-	 * The next os image default is u-boot proper
+	 * The next os image default is u-boot proper, once enable
+	 * OpenSBI OS boot mode, the OS image should be linux.
 	 */
-	os_type = IH_OS_U_BOOT;
+	if (CONFIG_IS_ENABLED(LOAD_FIT_OPENSBI_OS_BOOT))
+		os_type = IH_OS_LINUX;
+	else
+		os_type = IH_OS_U_BOOT;
+
 	ret = spl_opensbi_find_os_node(spl_image->fdt_addr, &os_node, os_type);
 	if (ret) {
 		pr_err("Can't find %s node for opensbi, %d\n",
-- 
2.34.1

Re: [PATCH V2 5/7] spl: riscv: add os type for next booting stage

[Simon Glass]

On Wed, 11 Oct 2023 at 23:44, Randolph <randolph@andestech.com> wrote:
>
> If SPL_LOAD_FIT_OPENSBI_OS_BOOT is enabled, the function
> spl_invoke_opensbi should change the target OS type to IH_OS_LINUX.
> OpenSBI will load the Linux image as the next boot stage.
> The os_takes_devicetree function returns a value of true or false
> depending on whether or not SPL_LOAD_FIT_OPENSBI_OS_BOOT is enabled.
>
> Signed-off-by: Randolph <randolph@andestech.com>
> ---
>  common/spl/spl_fit.c     | 3 ++-
>  common/spl/spl_opensbi.c | 9 +++++++--
>  2 files changed, 9 insertions(+), 3 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[PATCH V2 6/7] andes: config: add riscv falcon mode for ae350 platform

[Randolph]

Fork from ae350_rv[32/64]_spl_[xip]_defconfig and
append CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT=y

Signed-off-by: Randolph <randolph@andestech.com>
---
 configs/ae350_rv32_falcon_defconfig     | 60 ++++++++++++++++++++++++
 configs/ae350_rv32_falcon_xip_defconfig | 61 +++++++++++++++++++++++++
 configs/ae350_rv64_falcon_defconfig     | 60 ++++++++++++++++++++++++
 configs/ae350_rv64_falcon_xip_defconfig | 61 +++++++++++++++++++++++++
 4 files changed, 242 insertions(+)
 create mode 100644 configs/ae350_rv32_falcon_defconfig
 create mode 100644 configs/ae350_rv32_falcon_xip_defconfig
 create mode 100644 configs/ae350_rv64_falcon_defconfig
 create mode 100644 configs/ae350_rv64_falcon_xip_defconfig

diff --git a/configs/ae350_rv32_falcon_defconfig b/configs/ae350_rv32_falcon_defconfig
new file mode 100644
index 0000000000..8f796d88e3
--- /dev/null
+++ b/configs/ae350_rv32_falcon_defconfig
@@ -0,0 +1,60 @@
+CONFIG_RISCV=y
+CONFIG_TEXT_BASE=0x01800000
+CONFIG_SYS_MALLOC_LEN=0x80000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
+CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_SYS_MONITOR_LEN=786432
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x100000
+CONFIG_TARGET_ANDES_AE350=y
+CONFIG_RISCV_SMODE=y
+# CONFIG_AVAILABLE_HARTS is not set
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
+CONFIG_SYS_MONITOR_BASE=0x88000000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTDELAY=3
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_MAX_SIZE=0x100000
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_CACHE=y
+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
+CONFIG_SYS_PBSIZE=1050
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF_TEST=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
+CONFIG_CMD_CACHE=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RETRY_COUNT=50
+CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
+CONFIG_FLASH_SHOW_PROGRESS=0
+CONFIG_SYS_CFI_FLASH_STATUS_POLL=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_FTMAC100=y
+CONFIG_BAUDRATE=38400
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_ATCSPI200_SPI=y
+# CONFIG_BINMAN_FDT is not set
+CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT=y
\ No newline at end of file
diff --git a/configs/ae350_rv32_falcon_xip_defconfig b/configs/ae350_rv32_falcon_xip_defconfig
new file mode 100644
index 0000000000..e01dd6fc51
--- /dev/null
+++ b/configs/ae350_rv32_falcon_xip_defconfig
@@ -0,0 +1,61 @@
+CONFIG_RISCV=y
+CONFIG_TEXT_BASE=0x01800000
+CONFIG_SYS_MALLOC_LEN=0x80000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
+CONFIG_SPL_TEXT_BASE=0x80000000
+CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_SYS_MONITOR_LEN=786432
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x100000
+CONFIG_TARGET_ANDES_AE350=y
+CONFIG_RISCV_SMODE=y
+CONFIG_SPL_XIP=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
+CONFIG_SYS_MONITOR_BASE=0x88000000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTDELAY=3
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_MAX_SIZE=0x100000
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_CACHE=y
+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
+CONFIG_SYS_PBSIZE=1050
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF_TEST=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
+CONFIG_CMD_CACHE=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RETRY_COUNT=50
+CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
+CONFIG_FLASH_SHOW_PROGRESS=0
+CONFIG_SYS_CFI_FLASH_STATUS_POLL=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_FTMAC100=y
+CONFIG_BAUDRATE=38400
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_ATCSPI200_SPI=y
+# CONFIG_BINMAN_FDT is not set
+CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT=y
\ No newline at end of file
diff --git a/configs/ae350_rv64_falcon_defconfig b/configs/ae350_rv64_falcon_defconfig
new file mode 100644
index 0000000000..d11be976de
--- /dev/null
+++ b/configs/ae350_rv64_falcon_defconfig
@@ -0,0 +1,60 @@
+CONFIG_RISCV=y
+CONFIG_TEXT_BASE=0x01800000
+CONFIG_SYS_MALLOC_LEN=0x80000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
+CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x100000
+CONFIG_TARGET_ANDES_AE350=y
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+# CONFIG_AVAILABLE_HARTS is not set
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
+CONFIG_SYS_MONITOR_BASE=0x88000000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTDELAY=3
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_MAX_SIZE=0x100000
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_CACHE=y
+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
+CONFIG_SYS_PBSIZE=1050
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF_TEST=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
+CONFIG_CMD_CACHE=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RETRY_COUNT=50
+CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
+CONFIG_FLASH_SHOW_PROGRESS=0
+CONFIG_SYS_CFI_FLASH_STATUS_POLL=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_FTMAC100=y
+CONFIG_BAUDRATE=38400
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_ATCSPI200_SPI=y
+# CONFIG_BINMAN_FDT is not set
+CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT=y
\ No newline at end of file
diff --git a/configs/ae350_rv64_falcon_xip_defconfig b/configs/ae350_rv64_falcon_xip_defconfig
new file mode 100644
index 0000000000..492451ecf1
--- /dev/null
+++ b/configs/ae350_rv64_falcon_xip_defconfig
@@ -0,0 +1,61 @@
+CONFIG_RISCV=y
+CONFIG_TEXT_BASE=0x01800000
+CONFIG_SYS_MALLOC_LEN=0x80000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
+CONFIG_SPL_TEXT_BASE=0x80000000
+CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x100000
+CONFIG_TARGET_ANDES_AE350=y
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_SPL_XIP=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
+CONFIG_SYS_MONITOR_BASE=0x88000000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTDELAY=3
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_MAX_SIZE=0x100000
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_CACHE=y
+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
+CONFIG_SYS_PBSIZE=1050
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF_TEST=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
+CONFIG_CMD_CACHE=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RETRY_COUNT=50
+CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
+CONFIG_FLASH_SHOW_PROGRESS=0
+CONFIG_SYS_CFI_FLASH_STATUS_POLL=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_FTMAC100=y
+CONFIG_BAUDRATE=38400
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_ATCSPI200_SPI=y
+# CONFIG_BINMAN_FDT is not set
+CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT=y
\ No newline at end of file
-- 
2.34.1

Re: [PATCH V2 6/7] andes: config: add riscv falcon mode for ae350 platform

[Leo Liang]

On Thu, Oct 12, 2023 at 02:35:08PM +0800, Randolph wrote:
> Fork from ae350_rv[32/64]_spl_[xip]_defconfig and
> append CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT=y
> 
> Signed-off-by: Randolph <randolph@andestech.com>
> ---
>  configs/ae350_rv32_falcon_defconfig     | 60 ++++++++++++++++++++++++
>  configs/ae350_rv32_falcon_xip_defconfig | 61 +++++++++++++++++++++++++
>  configs/ae350_rv64_falcon_defconfig     | 60 ++++++++++++++++++++++++
>  configs/ae350_rv64_falcon_xip_defconfig | 61 +++++++++++++++++++++++++
>  4 files changed, 242 insertions(+)
>  create mode 100644 configs/ae350_rv32_falcon_defconfig
>  create mode 100644 configs/ae350_rv32_falcon_xip_defconfig
>  create mode 100644 configs/ae350_rv64_falcon_defconfig
>  create mode 100644 configs/ae350_rv64_falcon_xip_defconfig

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

[PATCH V2 7/7] riscv: spl: andes: Move the DTB in front of kernel

[Randolph]

Originally, u-boot SPL will place the DTB directly after the kernel,
but the size of the kernel does not include the BSS section, This
means that u-boot SPL places the DTB in the kernel BSS section causing
the DTB to be cleared by the kernel BSS initialisation.

Moving the DTB in front of the kernel can avoid this error.

Signed-off-by: Randolph <randolph@andestech.com>
---
 board/AndesTech/ae350/ae350.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/board/AndesTech/ae350/ae350.c b/board/AndesTech/ae350/ae350.c
index 1c2288b6ce..d78ee403e6 100644
--- a/board/AndesTech/ae350/ae350.c
+++ b/board/AndesTech/ae350/ae350.c
@@ -19,6 +19,8 @@
 #include <fdtdec.h>
 #include <dm.h>
 #include <spl.h>
+#include <mapmem.h>
+#include <hang.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -26,6 +28,29 @@ DECLARE_GLOBAL_DATA_PTR;
  * Miscellaneous platform dependent initializations
  */
 
+#if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL)
+#define ANDES_SPL_FDT_ADDR	(CONFIG_TEXT_BASE - 0x100000)
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+	/*
+	 * Originally, u-boot-spl will place DTB directly after the kernel,
+	 * but the size of the kernel did not include the BSS section, which
+	 * means u-boot-spl will place the DTB in the kernel BSS section
+	 * causing the DTB to be cleared by kernel BSS initializtion.
+	 * Moving DTB in front of the kernel can avoid the error.
+	 */
+	if (ANDES_SPL_FDT_ADDR < 0) {
+		printf("%s: CONFIG_TEXT_BASE needs to be larger than 0x100000\n",
+		       __func__);
+		hang();
+	}
+
+	memcpy((void *)ANDES_SPL_FDT_ADDR, spl_image->fdt_addr,
+	       fdt_totalsize(spl_image->fdt_addr));
+	spl_image->fdt_addr = map_sysmem(ANDES_SPL_FDT_ADDR, 0);
+}
+#endif
+
 int board_init(void)
 {
 	gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
-- 
2.34.1

Re: [PATCH V2 7/7] riscv: spl: andes: Move the DTB in front of kernel

[Leo Liang]

On Thu, Oct 12, 2023 at 02:35:09PM +0800, Randolph wrote:
> Originally, u-boot SPL will place the DTB directly after the kernel,
> but the size of the kernel does not include the BSS section, This
> means that u-boot SPL places the DTB in the kernel BSS section causing
> the DTB to be cleared by the kernel BSS initialisation.
> 
> Moving the DTB in front of the kernel can avoid this error.
> 
> Signed-off-by: Randolph <randolph@andestech.com>
> ---
>  board/AndesTech/ae350/ae350.c | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>