Re: [PATCH] riscv: binman: fix the load field format

Simon Glass
2023-11-15T03:12:01Z

Hi Randolph,

On Mon, 13 Nov 2023 at 23:26, Randolph Lin <randolph@andestech.com> wrote:
>
> Hi Simon,
> Thanks a lot.
> On Fri, Nov 10, 2023 at 04:50:24AM -0700, Simon Glass wrote:
> > Hi Randolph,
> >
> > On Wed, Nov 8, 2023, 20:15 Randolph <randolph@andestech.com> wrote:
> > >
> > > The #address-cells is now equal to 2. The format of the load field for
> > > the Linux kernel doesn't match.
> > >
> > > Signed-off-by: Randolph <randolph@andestech.com>
> > > ---
> > > arch/riscv/dts/binman.dtsi | 3 ++-
> > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
> > > index 6b4eb8dc7b..5117d7c8c9 100644
> > > --- a/arch/riscv/dts/binman.dtsi
> > > +++ b/arch/riscv/dts/binman.dtsi
> > > @@ -50,7 +50,8 @@
> > > os = "Linux";
> > > arch = "riscv";
> > > compression = "none";
> > > - load = <CONFIG_TEXT_BASE>;
> > > + load = <U64_TO_U32_H(CONFIG_TEXT_BASE)
> > > + U64_TO_U32_L(CONFIG_TEXT_BASE)>;
> >
> I just see the #address-cells changed from 1 to 2 in commit id: 5a348ccf0257.
> In my last commit for binman.dtsi (commit id: d311df8b3169), it is based on
> the value of #address-cells being 1. That's the reason for my patch submission.
> > Does this work?
> >
> > load = /bits 64/ <CONFIG_TEXT_BASE>
> >
> Yes, it works. We use this way for the DDR memory start address above 4G
> platform. We find the example for 64bit address in the document
> tools/binman/binman.rst and use it.
> What is the method that we should continue to use in the binman.dtsi?
> 1. #address-cells = 2
> 2. append /bits/64

I believe these go together. Using (1) means you have a 2-cell value,
which is 64 bits since each cell is 32-bits.

Or perhaps I misunderstand what you are asking?

> > >
> > > linux_blob: blob-ext {
> > > filename = "Image";
> > > --
> > > 2.34.1
> > >
> >

Regards,
Simon