Re: [PATCH v2] riscv: Add support for AMD/Xilinx MicroBlaze V

[Leo Liang <ycliang@andestech.com>]

On Mon, Nov 06, 2023 at 12:56:47PM +0100, Michal Simek wrote:
> MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP.
> It is hardware compatible with classic MicroBlaze processor.
> 
> The patch contains initial wiring and configuration for initial HW design
> with memory, cpu, interrupt controller, timers and uartlite console
> (interrupt controller is listed but U-Boot is not using it).
> 
> Provided DT is just describing one configuration and should be taken only
> as example.
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
> Changes in v2:
> - Extend commit message
> - DT changes, add interrupt controller, check agains dt schema
> - The patch for amd,mbv32 compatible string is here
> https://lore.kernel.org/r/d442d916204d26f82c1c3a924a4cdfb117960e1b.1699270661.git.michal.simek@amd.com
> - The patch for board compatibility is here
> https://lore.kernel.org/r/50c277c92c41a582ef171fb75efc6a6a4f860be2.1699271616.git.michal.simek@amd.com
> 
> xlnx,xps-intc-1.00.a driver exists in the Linux kernel but DT binding is
> missing. That's something what we need to work on.
> arch/arm64/boot/dts/xilinx/xilinx-mbv32.dtb: /axi/interrupt-controller@41200000: failed to match any schema with compatible: ['xlnx,xps-intc-1.00.a']
> 
> Public annoucement is available here if someone is interested.
> https://www.xilinx.com/products/design-tools/microblaze-v.html?utm_source=marketo&utm_medium=email&utm_campaign=EN-EM-2023-11-02-New-MicroBlaze-V-Processor&utm_term=btn&mkt_tok=NDA5LVdZWC03MjQAAAGPMMJYuPPscCags7WdvOeUSWy-_mC9aOwrobFaZRf5ok_eHoQUvTLBzJdHrkcBId9tQ4a-odfnU91WjUkIxx-iSG4OKGofjK5iZcAiK_VN8_xK
> 
> ---
>  arch/riscv/Kconfig                   |   4 +
>  arch/riscv/dts/Makefile              |   2 +
>  arch/riscv/dts/xilinx-mbv32.dts      | 106 +++++++++++++++++++++++++++
>  board/xilinx/Kconfig                 |   3 +-
>  board/xilinx/common/board.c          |   5 ++
>  board/xilinx/mbv/Kconfig             |  28 +++++++
>  board/xilinx/mbv/MAINTAINERS         |   7 ++
>  board/xilinx/mbv/Makefile            |   5 ++
>  board/xilinx/mbv/board.c             |  11 +++
>  configs/xilinx_mbv32_defconfig       |  30 ++++++++
>  configs/xilinx_mbv32_smode_defconfig |  32 ++++++++
>  include/configs/xilinx_mbv.h         |   6 ++
>  12 files changed, 238 insertions(+), 1 deletion(-)
>  create mode 100644 arch/riscv/dts/xilinx-mbv32.dts
>  create mode 100644 board/xilinx/mbv/Kconfig
>  create mode 100644 board/xilinx/mbv/MAINTAINERS
>  create mode 100644 board/xilinx/mbv/Makefile
>  create mode 100644 board/xilinx/mbv/board.c
>  create mode 100644 configs/xilinx_mbv32_defconfig
>  create mode 100644 configs/xilinx_mbv32_smode_defconfig
>  create mode 100644 include/configs/xilinx_mbv.h
 
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>