Re: [PATCH v2 1/3] riscv: image: Add new image type for RV64

[Yao Zi <ziyao@disroot.org>]

On Fri, Apr 04, 2025 at 02:48:55PM +0000, Mayuresh Chitale wrote:
> Similar to ARM and X86, introduce a new image type which allows u-boot
> to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.
> 
> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
> Reviewed-by: Maxim Moskalets <maximmosk4@gmail.com>
> ---
>  boot/image.c    | 3 ++-
>  include/image.h | 3 ++-
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/boot/image.c b/boot/image.c
> index 139c5bd035a..45299a7dc33 100644
> --- a/boot/image.c
> +++ b/boot/image.c
> @@ -92,7 +92,8 @@ static const table_entry_t uimage_arch[] = {
>  	{	IH_ARCH_ARC,		"arc",		"ARC",		},
>  	{	IH_ARCH_X86_64,		"x86_64",	"AMD x86_64",	},
>  	{	IH_ARCH_XTENSA,		"xtensa",	"Xtensa",	},
> -	{	IH_ARCH_RISCV,		"riscv",	"RISC-V",	},
> +	{	IH_ARCH_RISCV,		"riscv",	"RISC-V 32 Bit",},
> +	{	IH_ARCH_RISCV64,	"riscv64",	"RISC-V 64 Bit",},
>  	{	-1,			"",		"",		},
>  };
>  
> diff --git a/include/image.h b/include/image.h
> index 07912606f33..411bfcd0877 100644
> --- a/include/image.h
> +++ b/include/image.h
> @@ -138,7 +138,8 @@ enum {
>  	IH_ARCH_ARC,			/* Synopsys DesignWare ARC */
>  	IH_ARCH_X86_64,			/* AMD x86_64, Intel and Via */
>  	IH_ARCH_XTENSA,			/* Xtensa	*/
> -	IH_ARCH_RISCV,			/* RISC-V */
> +	IH_ARCH_RISCV,			/* RISC-V 32 bit*/

I'll consider IH_ARCH_RISCV32 a better idea, instead of implying 32bit
when no suffix attached. We (and the Linux kernel) mix 32-bit and 64-bit
variants of RISC-V together, thus it's hard to tell the exact bitwidth
of "IH_ARCH_RISCV" without inspecting the code around. To me, it sounds
more like "RISC-V, but no bitwidth specified".

It will be nice if we could avoid this kind of ambiguity.

> +	IH_ARCH_RISCV64,		/* RISC-V 64 bit*/
>  	IH_ARCH_COUNT,
>  };
> -- 
> 2.43.0
> 

Thanks,
Yao Zi