[PATCH 0/2] sunxi: Support UART1 and UART2 on the T113

[PATCH 0/2] sunxi: Support UART1 and UART2 on the T113

[John Watts]

The T113 supports UART1 and UART2 on PG and PD pins respectively.
Add support for these in U-Boot so we can use them.

Note: I'm not entirely sure if the PD pins should be default, they
overlap with the LCD pins. I am however using this on a real board.

Signed-off-by: John Watts <contact@jookia.org>
---
John Watts (2):
      sunxi: Support UART1 on the T113
      sunxi: Support UART2 on the T113

 arch/arm/mach-sunxi/board.c | 9 +++++++--
 include/sunxi_gpio.h        | 1 +
 2 files changed, 8 insertions(+), 2 deletions(-)
---
base-commit: 777c28460947371ada40868dc994dfe8537d7115
change-id: 20240411-t113serial-a6e9ca8d8848

Best regards,
-- 
John Watts <contact@jookia.org>

[PATCH 1/2] sunxi: Support UART1 on the T113

[John Watts]

The T113 supports UART1 on pins PG6 and PG7, add support for it here.

Signed-off-by: John Watts <contact@jookia.org>
---
 arch/arm/mach-sunxi/board.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index f4dbb2a740..f5da50b43a 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -174,8 +174,9 @@ static int gpio_init(void)
 	sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
 	sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
 	sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP);
-#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I) && \
-				!defined(CONFIG_MACH_SUN8I_R40)
+#elif CONFIG_CONS_INDEX == 2 && ((defined(CONFIG_MACH_SUN8I) && \
+				!defined(CONFIG_MACH_SUN8I_R40)) || \
+				defined(CONFIG_MACH_SUN8I_R528))
 	sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN8I_GPG_UART1);
 	sunxi_gpio_set_cfgpin(SUNXI_GPG(7), SUN8I_GPG_UART1);
 	sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP);

-- 
2.44.0

[PATCH 2/2] sunxi: Support UART2 on the T113

[John Watts]

The T113 supports UART2 on PD1 and PD2. Add it as an option.

Signed-off-by: John Watts <contact@jookia.org>
---
 arch/arm/mach-sunxi/board.c | 4 ++++
 include/sunxi_gpio.h        | 1 +
 2 files changed, 5 insertions(+)

diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index f5da50b43a..4176543cd9 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -166,6 +166,10 @@ static int gpio_init(void)
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
 	sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I_R528)
+	sunxi_gpio_set_cfgpin(SUNXI_GPD(1), SUN8I_T113_GPD_UART2);
+	sunxi_gpio_set_cfgpin(SUNXI_GPD(2), SUN8I_T113_GPD_UART2);
+	sunxi_gpio_set_pull(SUNXI_GPD(2), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 4 && defined(CONFIG_MACH_SUN8I_R528)
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(6), 7);
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(7), 7);
diff --git a/include/sunxi_gpio.h b/include/sunxi_gpio.h
index db3742c039..88ab1d192f 100644
--- a/include/sunxi_gpio.h
+++ b/include/sunxi_gpio.h
@@ -120,6 +120,7 @@ enum sunxi_gpio_number {
 #define SUN8I_A83T_GPB_UART0	2
 #define SUN8I_V3S_GPB_UART0	3
 #define SUN50I_GPB_UART0	4
+#define SUN8I_T113_GPD_UART2	5
 
 #define SUNXI_GPC_NAND		2
 #define SUNXI_GPC_SPI0		3

-- 
2.44.0

Re: [PATCH 0/2] sunxi: Support UART1 and UART2 on the T113

[Andre Przywara]

On Thu, 11 Apr 2024 15:14:14 +1000
John Watts <contact@jookia.org> wrote:

Hi John,

> The T113 supports UART1 and UART2 on PG and PD pins respectively.
> Add support for these in U-Boot so we can use them.

So those bits are just for the *debug* UARTs. Traditionally this is UART0,
with some particular pinmux, sometimes UART2 on older SoCs.

So is there a board that uses those pins for a debug console? I want to
avoid making this code even messier than it already is, without good
reasons. Also please note that I tried to clean this up here:
https://patchwork.ozlabs.org/project/uboot/patch/20240103001239.17482-20-andre.przywara@arm.com/

> Note: I'm not entirely sure if the PD pins should be default, they
> overlap with the LCD pins. I am however using this on a real board.

Is this a custom board? Could you consider using UART0 for debug then?
This one doesn't support RTS/CTS, so you do not waste the more capable
UARTs for debug.

Cheers,
Andre

> Signed-off-by: John Watts <contact@jookia.org>
> ---
> John Watts (2):
>       sunxi: Support UART1 on the T113
>       sunxi: Support UART2 on the T113
> 
>  arch/arm/mach-sunxi/board.c | 9 +++++++--
>  include/sunxi_gpio.h        | 1 +
>  2 files changed, 8 insertions(+), 2 deletions(-)
> ---
> base-commit: 777c28460947371ada40868dc994dfe8537d7115
> change-id: 20240411-t113serial-a6e9ca8d8848
> 
> Best regards,

Re: [PATCH 0/2] sunxi: Support UART1 and UART2 on the T113

[Jookia]

On Thu, Apr 11, 2024 at 01:37:38PM +0100, Andre Przywara wrote:
> Hi John,
> 
> > The T113 supports UART1 and UART2 on PG and PD pins respectively.
> > Add support for these in U-Boot so we can use them.
> 
> So those bits are just for the *debug* UARTs. Traditionally this is UART0,
> with some particular pinmux, sometimes UART2 on older SoCs.

Hi Andre,

No board uses this by default, so I'll just carry this out of tree then.
Thanks for looking at the patch!

> So is there a board that uses those pins for a debug console? I want to
> avoid making this code even messier than it already is, without good
> reasons. Also please note that I tried to clean this up here:
> https://patchwork.ozlabs.org/project/uboot/patch/20240103001239.17482-20-andre.przywara@arm.com/

I'll give this a test and review for you when I can.

John.