[PATCH v2 0/3] board: sophgo: milkv_duo: Add ethernet support for Milk-V Duo board

[PATCH v2 0/3] board: sophgo: milkv_duo: Add ethernet support for Milk-V Duo board

[Kongyang Liu]

This series add init code for cv1800b ethernet phy and enable ethernet
support for Sophgo Milk-V Duo board.

In cv1800b, as the PHY register phy_id being initialized to 0, it is
necessary to initialize the PHY before the ethernet driver initialization.
Therefore, the initialization code is placed in the board_init function.

For the Linux kernel, due to the presence of a hibernation mechanism, whether
the phy id will be reset to 0 after hibernation and how to reassign it
thereafter remains an issue to consider. Once this issue is resolved, the
Ethernet driver for the Milk-V Duo will be sent to the kernel.

Changes in v2:
- Change compatible
- Add clocks and interrupt properties.

Kongyang Liu (3):
  board: milkv_duo: Add init code for Milk-V Duo ethernet
  riscv: dts: sophgo: Add ethernet node
  configs: milkv_duo: Add ethernet configs

 arch/riscv/dts/cv1800b-milkv-duo.dts |  7 ++-
 arch/riscv/dts/cv18xx.dtsi           | 23 ++++++++
 board/sophgo/milkv_duo/Makefile      |  3 +-
 board/sophgo/milkv_duo/board.c       |  4 ++
 board/sophgo/milkv_duo/ethernet.c    | 79 ++++++++++++++++++++++++++++
 board/sophgo/milkv_duo/ethernet.h    | 11 ++++
 configs/milkv_duo_defconfig          |  4 ++
 drivers/net/designware.c             |  1 +
 8 files changed, 130 insertions(+), 2 deletions(-)
 create mode 100644 board/sophgo/milkv_duo/ethernet.c
 create mode 100644 board/sophgo/milkv_duo/ethernet.h

-- 
2.41.0

[PATCH v2 1/3] board: milkv_duo: Add init code for Milk-V Duo ethernet

[Kongyang Liu]

Initialize register in cv1800b ethernet phy to make it compatible with
generic phy driver

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

---

(no changes since v1)

 board/sophgo/milkv_duo/Makefile   |  3 +-
 board/sophgo/milkv_duo/board.c    |  4 ++
 board/sophgo/milkv_duo/ethernet.c | 79 +++++++++++++++++++++++++++++++
 board/sophgo/milkv_duo/ethernet.h | 11 +++++
 drivers/net/designware.c          |  1 +
 5 files changed, 97 insertions(+), 1 deletion(-)
 create mode 100644 board/sophgo/milkv_duo/ethernet.c
 create mode 100644 board/sophgo/milkv_duo/ethernet.h

diff --git a/board/sophgo/milkv_duo/Makefile b/board/sophgo/milkv_duo/Makefile
index a087013f5c..d0525eba85 100644
--- a/board/sophgo/milkv_duo/Makefile
+++ b/board/sophgo/milkv_duo/Makefile
@@ -2,4 +2,5 @@
 #
 # Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
 
-obj-y := board.o
+obj-y += board.o
+obj-$(CONFIG_NET) += ethernet.o
diff --git a/board/sophgo/milkv_duo/board.c b/board/sophgo/milkv_duo/board.c
index eaa47be173..311576fe1c 100644
--- a/board/sophgo/milkv_duo/board.c
+++ b/board/sophgo/milkv_duo/board.c
@@ -3,7 +3,11 @@
  * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
  */
 
+#include "ethernet.h"
+
 int board_init(void)
 {
+	if (IS_ENABLED(CONFIG_NET))
+		cv1800b_ephy_init();
 	return 0;
 }
diff --git a/board/sophgo/milkv_duo/ethernet.c b/board/sophgo/milkv_duo/ethernet.c
new file mode 100644
index 0000000000..e997ce1037
--- /dev/null
+++ b/board/sophgo/milkv_duo/ethernet.c
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+ */
+
+#include <linux/io.h>
+#include <linux/bitops.h>
+#include <linux/mii.h>
+
+#define REG_EPHY_TOP_WRAP (u32 *)0x03009800
+#define REG_EPHY_BASE     (u32 *)0x03009000
+
+#define REG_EPHY_CTL         REG_EPHY_TOP_WRAP
+#define REG_EPHY_APB_RW_SEL  REG_EPHY_TOP_WRAP + 1
+
+/* Page 0 register */
+#define REG_PHY_ID1          REG_EPHY_BASE + MII_PHYSID1
+#define REG_PHY_ID2          REG_EPHY_BASE + MII_PHYSID2
+#define REG_PHY_PAGE_SEL     REG_EPHY_BASE + 0x1f
+
+/* Page 5 register */
+#define REG_PD_EN_CTL        REG_EPHY_BASE + 0x10
+
+/* REG_EPHY_CTL */
+#define REG_EPHY_SHUTDOWN    BIT(0)
+#define REG_EPHY_ANA_RST_N   BIT(1)
+#define REG_EPHY_DIG_RST_N   BIT(2)
+#define REG_EPHY_MAIN_RST_N  BIT(3)
+
+/* REG_PD_EN_CTL */
+#define REG_EN_ETH_TXRT          BIT(0)
+#define REG_EN_ETH_CLK100M       BIT(1)
+#define REG_EN_ETH_CLK125M       BIT(2)
+#define REG_EN_ETH_PLL_LCKDET    BIT(3)
+#define REG_EN_ETH_RXADC         BIT(4)
+#define REG_EN_ETH_RXPGA         BIT(5)
+#define REG_EN_ETH_RXRT          BIT(6)
+#define REG_EN_ETH_TXCROSSOVER   BIT(7)
+#define REG_PD_ETH_PLL           BIT(8)
+#define REG_PD_ETH_TXDAC         BIT(9)
+#define REG_PD_ETH_TXDACBST      BIT(10)
+#define REG_PD_ETH_TXECHO        BIT(11)
+#define REG_PD_ETH_TXDRV_NMOS    BIT(12)
+#define REG_PD_ETH_TXLDO         BIT(13)
+
+void cv1800b_ephy_init(void)
+{
+	u32 reg;
+	u32 phy_id = 1;
+
+	/* enable direct memory access for phy register */
+	writel(1, REG_EPHY_APB_RW_SEL);
+
+	reg = readl(REG_EPHY_CTL);
+	reg &= ~REG_EPHY_SHUTDOWN;
+	reg |= REG_EPHY_ANA_RST_N | REG_EPHY_DIG_RST_N | REG_EPHY_MAIN_RST_N;
+	writel(reg, REG_EPHY_CTL);
+
+	/* switch to page 5 */
+	writel(5 << 8, REG_PHY_PAGE_SEL);
+	reg = readl(REG_PD_EN_CTL);
+	reg &= ~(REG_PD_ETH_TXLDO | REG_PD_ETH_TXDRV_NMOS | REG_PD_ETH_TXDAC | REG_PD_ETH_PLL);
+	reg |= REG_EN_ETH_TXRT | REG_EN_ETH_CLK100M | REG_EN_ETH_CLK125M
+		| REG_EN_ETH_PLL_LCKDET | REG_EN_ETH_RXADC | REG_EN_ETH_RXPGA | REG_EN_ETH_RXRT;
+	writel(reg, REG_PD_EN_CTL);
+
+	/* switch to page 0 */
+	writel(0 << 8, REG_PHY_PAGE_SEL);
+	/*
+	 * As the phy_id in the cv1800b PHY register is initialized to 0, it
+	 * is necessary to manually initialize the phy_id to an arbitrary
+	 * value so that it could corresponds to the generic PHY driver.
+	 */
+	writel(phy_id >> 16, REG_PHY_ID1);
+	writel(phy_id & 0xffff, REG_PHY_ID2);
+
+	/* switch to MDIO control */
+	writel(0, REG_EPHY_APB_RW_SEL);
+}
diff --git a/board/sophgo/milkv_duo/ethernet.h b/board/sophgo/milkv_duo/ethernet.h
new file mode 100644
index 0000000000..7b21f1b0f6
--- /dev/null
+++ b/board/sophgo/milkv_duo/ethernet.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+ */
+
+#ifndef __CV1800B_ETHERNET_H
+#define __CV1800B_ETHERNET_H
+
+void cv1800b_ephy_init(void);
+
+#endif
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 4c1642b29a..682045cea2 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -871,6 +871,7 @@ static const struct udevice_id designware_eth_ids[] = {
 	{ .compatible = "amlogic,meson6-dwmac" },
 	{ .compatible = "st,stm32-dwmac" },
 	{ .compatible = "snps,arc-dwmac-3.70a" },
+	{ .compatible = "sophgo,cv1800b-dwmac" },
 	{ }
 };
 
-- 
2.41.0

[PATCH v2 2/3] riscv: dts: sophgo: Add ethernet node

[Kongyang Liu]

Add ethernet node for cv1800b SoC

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>

---

Changes in v2:
- Change compatible
- Add clocks and interrupt properties.

 arch/riscv/dts/cv1800b-milkv-duo.dts |  7 ++++++-
 arch/riscv/dts/cv18xx.dtsi           | 23 +++++++++++++++++++++++
 2 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/dts/cv1800b-milkv-duo.dts b/arch/riscv/dts/cv1800b-milkv-duo.dts
index 94e64ddce8..c1e6611e33 100644
--- a/arch/riscv/dts/cv1800b-milkv-duo.dts
+++ b/arch/riscv/dts/cv1800b-milkv-duo.dts
@@ -29,6 +29,11 @@
 	};
 };
 
+&ethernet0 {
+	status = "okay";
+	phy-mode = "rmii";
+};
+
 &osc {
 	clock-frequency = <25000000>;
 };
@@ -39,7 +44,7 @@
 	no-1-8-v;
 	no-mmc;
 	no-sdio;
-};
+}
 
 &uart0 {
 	status = "okay";
diff --git a/arch/riscv/dts/cv18xx.dtsi b/arch/riscv/dts/cv18xx.dtsi
index ec99c4deeb..c95bac77be 100644
--- a/arch/riscv/dts/cv18xx.dtsi
+++ b/arch/riscv/dts/cv18xx.dtsi
@@ -50,6 +50,20 @@
 		clock-frequency = <375000000>;
 		clock-output-names = "sdhci_clk";
 		#clock-cells = <0>;
+	}
+
+	eth_csrclk: eth-csrclk {
+		compatible = "fixed-clock";
+		clock-frequency = <250000000>;
+		clock-output-names = "eth_csrclk";
+		#clock-cells = <0x0>;
+	};
+
+	eth_ptpclk: eth-ptpclk {
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+		clock-output-names = "eth_ptpclk";
+		#clock-cells = <0x0>;
 	};
 
 	soc {
@@ -138,6 +152,15 @@
 			};
 		};
 
+		ethernet0: ethernet@4070000 {
+			compatible = "sophgo,cv1800b-dwmac";
+			reg = <0x04070000 0x10000>;
+			interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&eth_csrclk>, <&eth_ptpclk>;
+			clock-names = "stmmaceth", "ptp_ref";
+			status = "disabled";
+		};
+
 		uart0: serial@4140000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x04140000 0x100>;
-- 
2.41.0

Re: [PATCH v2 2/3] riscv: dts: sophgo: Add ethernet node

[Leo Liang]

On Sat, Apr 20, 2024 at 03:00:28PM +0800, Kongyang Liu wrote:
> Add ethernet node for cv1800b SoC
> 
> Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
> ---
> 
> Changes in v2:
> - Change compatible
> - Add clocks and interrupt properties.
> 
>  arch/riscv/dts/cv1800b-milkv-duo.dts |  7 ++++++-
>  arch/riscv/dts/cv18xx.dtsi           | 23 +++++++++++++++++++++++
>  2 files changed, 29 insertions(+), 1 deletion(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

[PATCH v2 3/3] configs: milkv_duo: Add ethernet configs

[Kongyang Liu]

Add configs related to ethernet and ethernet boot command for Sophgo Milk-V
Duo board

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
---

(no changes since v1)

 configs/milkv_duo_defconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/configs/milkv_duo_defconfig b/configs/milkv_duo_defconfig
index e8413d7aa9..f66c4c5358 100644
--- a/configs/milkv_duo_defconfig
+++ b/configs/milkv_duo_defconfig
@@ -19,14 +19,18 @@ CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="milkv_duo# "
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PART=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PXE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_OVERWRITE=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_MMC=y
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ADMA=y
 CONFIG_MMC_SDHCI_CV1800B=y
+CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
 CONFIG_SYS_NS16550_MEM32=y
-- 
2.41.0