From: Paul Kocialkowski <paulk@sys-base.io>
To: Quentin Schulz <quentin.schulz@cherry.de>
Cc: u-boot@lists.denx.de, Simon Glass <sjg@chromium.org>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Kever Yang <kever.yang@rock-chips.com>,
Jonas Karlman <jonas@kwiboo.se>,
Chris Morgan <macromorgan@hotmail.com>,
Tim Lunn <tim@feathertop.org>,
Paul Kocialkowski <contact@paulk.fr>
Subject: Re: [PATCH 1/4] rockchip: rk3399-roc-pc: Hook sysreset gpio to enable full reset
Date: Fri, 27 Sep 2024 14:25:45 +0200 [thread overview]
Message-ID: <ZvakSVYH58S0_TBy@collins> (raw)
In-Reply-To: <d48e2192-6cb1-478a-92e0-0f0db5642822@cherry.de>
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Le Fri 27 Sep 24, 12:07, Quentin Schulz a écrit :
> > > > diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
> > > > index aecf7dbe383c..883d399a06a3 100644
> > > > --- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
> > > > +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
> > > > @@ -7,6 +7,10 @@
> > > > #include "rk3399-sdram-lpddr4-100.dtsi"
> > > > / {
> > > > + config {
> > > > + sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
> > >
> > > I think this is the wrong pin to use.
> > >
> > > The routing of GPIO1_A6 is similar on RK3399 Puma and Pine64 RockPro64, but
> > > it differs massively for the Firefly Roc PC.
> > >
> > > However, a similar routing is done for GPIO1_A5 on the Firefly, I believe
> > > that one is more appropriate. What do you think?
> >
> > I just double-checked the schematics (ROC_3399_PC), looking at signal OTP_OUT_H
> > which is definitely connected to GPIO1_A6 (P26).
> >
> > Also it clearly resets the board when toggled and solves the MMC reset issue
> > I was having on this exact board, so I'm rather confident that it's the right
> > one to use :)
>
> At least we're on the same page for using OTP_OUT_H, but it's routed to
> GPIO1_A5 on the schematics I found:
>
> https://www.t-firefly.com/download/Firefly-RK3399/hardware/Firefly-RK3399_V10/Firefly-RK3399_V10_SCH_(2017-2-8).pdf
>
> Mmmmmm seems like I was looking at the wrong schematics?
Ah yes I think the Firefly-RK3399 and ROC-RK3399-PC are two distinct designs.
> https://en.t-firefly.com/doc/download/page/id/51.html does route GPIO1_A6 to
> the OTP_OUT_H signal..
> https://en.t-firefly.com/doc/download/page/id/78.html
> https://en.t-firefly.com/doc/download/page/id/127.html
>
> So, the Roc PC, Roc PC Plus and Roc PC Pro all seem to have a similar
> routing for this pin, therefore:
>
> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Right, and for the record the version I have is the ROC-RK3399-PC Plus.
Thanks!
--
Paul Kocialkowski,
Independent contractor - sys-base - https://www.sys-base.io/
Free software developer - https://www.paulk.fr/
Specialist in multimedia, graphics and embedded hardware support with Linux.
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prev parent reply other threads:[~2024-09-27 12:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-26 18:31 [PATCH 1/4] rockchip: rk3399-roc-pc: Hook sysreset gpio to enable full reset Paul Kocialkowski
2024-09-26 18:31 ` [PATCH 2/4] rockchip: rk3399-rockpro64: " Paul Kocialkowski
2024-09-27 9:28 ` Quentin Schulz
2024-11-05 15:38 ` Quentin Schulz
2024-11-05 18:46 ` Paul Kocialkowski
2024-09-26 18:31 ` [PATCH 3/4] rockchip: rk3399-rockpro64: Disable bootstage instrumentation config Paul Kocialkowski
2024-09-30 9:01 ` Peter Robinson
2024-09-30 18:52 ` Simon Glass
2024-09-30 19:07 ` Paul Kocialkowski
2024-10-01 11:19 ` Simon Glass
2024-09-26 18:31 ` [PATCH 4/4] rockchip: Disable DRAM debug by default Paul Kocialkowski
2024-09-26 20:17 ` Dragan Simic
2024-09-26 20:51 ` Paul Kocialkowski
2024-09-26 21:04 ` Dragan Simic
2024-09-26 21:16 ` Paul Kocialkowski
2024-09-26 21:24 ` Dragan Simic
2024-09-26 21:39 ` Paul Kocialkowski
2024-09-26 21:50 ` Dragan Simic
2024-09-27 9:25 ` [PATCH 1/4] rockchip: rk3399-roc-pc: Hook sysreset gpio to enable full reset Quentin Schulz
2024-09-27 9:53 ` Paul Kocialkowski
2024-09-27 10:07 ` Quentin Schulz
2024-09-27 12:25 ` Paul Kocialkowski [this message]
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