* [PATCH] driver: sifive ccache: enable TRUNKCLOCKGATE and REGIONCLOCKGATE
@ 2024-10-30 7:58 Nick Hu
2024-11-06 10:51 ` Leo Liang
0 siblings, 1 reply; 2+ messages in thread
From: Nick Hu @ 2024-10-30 7:58 UTC (permalink / raw)
To: trini, u-boot, greentime.hu, zong.li; +Cc: Nick Hu
Enable the clock gating bit of ccache when the platform has the ccache0.
Signed-off-by: Nick Hu <nick.hu@sifive.com>
---
drivers/cache/cache-sifive-ccache.c | 33 ++++++++++++++++++++++++++---
1 file changed, 30 insertions(+), 3 deletions(-)
diff --git a/drivers/cache/cache-sifive-ccache.c b/drivers/cache/cache-sifive-ccache.c
index cc00b80f60b..2ff5ca701d6 100644
--- a/drivers/cache/cache-sifive-ccache.c
+++ b/drivers/cache/cache-sifive-ccache.c
@@ -14,8 +14,17 @@
#define SIFIVE_CCACHE_WAY_ENABLE 0x008
+#define SIFIVE_CCACHE_TRUNKCLOCKGATE 0x1000
+#define SIFIVE_CCACHE_TRUNKCLOCKGATE_DISABLE BIT(0)
+#define SIFIVE_CCACHE_REGIONCLOCKGATE_DISABLE BIT(1)
+
struct sifive_ccache {
void __iomem *base;
+ bool has_cg;
+};
+
+struct sifive_ccache_quirks {
+ bool has_cg;
};
static int sifive_ccache_enable(struct udevice *dev)
@@ -30,6 +39,14 @@ static int sifive_ccache_enable(struct udevice *dev)
writel(ways - 1, priv->base + SIFIVE_CCACHE_WAY_ENABLE);
+ if (priv->has_cg) {
+ /* enable clock gating bits */
+ config = readl(priv->base + SIFIVE_CCACHE_TRUNKCLOCKGATE);
+ config &= ~(SIFIVE_CCACHE_TRUNKCLOCKGATE_DISABLE |
+ SIFIVE_CCACHE_REGIONCLOCKGATE_DISABLE);
+ writel(config, priv->base + SIFIVE_CCACHE_TRUNKCLOCKGATE);
+ }
+
return 0;
}
@@ -50,7 +67,9 @@ static const struct cache_ops sifive_ccache_ops = {
static int sifive_ccache_probe(struct udevice *dev)
{
struct sifive_ccache *priv = dev_get_priv(dev);
+ const struct sifive_ccache_quirks *quirk = (void *)dev_get_driver_data(dev);
+ priv->has_cg = quirk->has_cg;
priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -EINVAL;
@@ -58,10 +77,18 @@ static int sifive_ccache_probe(struct udevice *dev)
return 0;
}
+static const struct sifive_ccache_quirks fu540_ccache = {
+ .has_cg = false,
+};
+
+static const struct sifive_ccache_quirks ccache0 = {
+ .has_cg = true,
+};
+
static const struct udevice_id sifive_ccache_ids[] = {
- { .compatible = "sifive,fu540-c000-ccache" },
- { .compatible = "sifive,fu740-c000-ccache" },
- { .compatible = "sifive,ccache0" },
+ { .compatible = "sifive,fu540-c000-ccache", .data = (ulong)&fu540_ccache },
+ { .compatible = "sifive,fu740-c000-ccache", .data = (ulong)&fu540_ccache },
+ { .compatible = "sifive,ccache0", .data = (ulong)&ccache0 },
{}
};
--
2.34.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] driver: sifive ccache: enable TRUNKCLOCKGATE and REGIONCLOCKGATE
2024-10-30 7:58 [PATCH] driver: sifive ccache: enable TRUNKCLOCKGATE and REGIONCLOCKGATE Nick Hu
@ 2024-11-06 10:51 ` Leo Liang
0 siblings, 0 replies; 2+ messages in thread
From: Leo Liang @ 2024-11-06 10:51 UTC (permalink / raw)
To: Nick Hu; +Cc: trini, u-boot, greentime.hu, zong.li
On Wed, Oct 30, 2024 at 03:58:36PM +0800, Nick Hu wrote:
> Enable the clock gating bit of ccache when the platform has the ccache0.
>
> Signed-off-by: Nick Hu <nick.hu@sifive.com>
> ---
> drivers/cache/cache-sifive-ccache.c | 33 ++++++++++++++++++++++++++---
> 1 file changed, 30 insertions(+), 3 deletions(-)
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
^ permalink raw reply [flat|nested] 2+ messages in thread
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