From: Leo Liang <ycliang@andestech.com>
To: Michal Simek <michal.simek@amd.com>
Cc: <u-boot@lists.denx.de>, <git@xilinx.com>,
Chia-Wei Wang <chiawei_wang@aspeedtech.com>,
Conor Dooley <conor.dooley@microchip.com>,
Kongyang Liu <seashell11234455@gmail.com>,
Marek Vasut <marex@denx.de>,
Padmarao Begari <padmarao.begari@amd.com>,
Rick Chen <rick@andestech.com>,
Sumit Garg <sumit.garg@linaro.org>, Tom Rini <trini@konsulko.com>
Subject: Re: [PATCH] riscv: Introduce configuration for 64bit version Microblaze V
Date: Wed, 6 Nov 2024 19:10:11 +0800 [thread overview]
Message-ID: <ZytOk0nmH4pcIebk@swlinux02> (raw)
In-Reply-To: <5b042f4ef4927b7f87e1f8623dabeab5a8642916.1730454641.git.michal.simek@amd.com>
On Fri, Nov 01, 2024 at 10:50:45AM +0100, Michal Simek wrote:
> The commit 7576ab2facae ("riscv: Add support for AMD/Xilinx MicroBlaze V")
> added support for 32bit version. 64bit version is also available that's why
> wire it up too.
> DT is providing description for generic QEMU target.
>
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
>
> arch/riscv/dts/Makefile | 1 +
> arch/riscv/dts/xilinx-mbv64.dts | 99 ++++++++++++++++++++++++++++
> configs/xilinx_mbv64_defconfig | 44 +++++++++++++
> configs/xilinx_mbv64_smode_defconfig | 48 ++++++++++++++
> 4 files changed, 192 insertions(+)
> create mode 100644 arch/riscv/dts/xilinx-mbv64.dts
> create mode 100644 configs/xilinx_mbv64_defconfig
> create mode 100644 configs/xilinx_mbv64_smode_defconfig
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
next prev parent reply other threads:[~2024-11-06 11:10 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-01 9:50 [PATCH] riscv: Introduce configuration for 64bit version Microblaze V Michal Simek
2024-11-06 11:10 ` Leo Liang [this message]
2024-11-07 4:20 ` Begari, Padmarao
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