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* [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location
@ 2024-11-01  9:49 Michal Simek
  2024-11-01  9:49 ` [PATCH 2/2] xilinx: mbv: Align smode_defconfig with upstream QEMU Michal Simek
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Michal Simek @ 2024-11-01  9:49 UTC (permalink / raw)
  To: u-boot, git; +Cc: Leo Yu-Chi Liang, Padmarao Begari, Tom Rini

DTB should be also placed to DDR. It should be the part of commit
9d688e6da5c9 ("riscv: mbv: Align DT with QEMU").

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 board/xilinx/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig
index c7df4ab5781a..0ff8440e6e06 100644
--- a/board/xilinx/Kconfig
+++ b/board/xilinx/Kconfig
@@ -45,7 +45,7 @@ config XILINX_OF_BOARD_DTB_ADDR
 	default 0x1000 if ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2
 	default 0x8000 if MICROBLAZE
 	default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP
-	default 0x23000000 if TARGET_XILINX_MBV
+	default 0x83000000 if TARGET_XILINX_MBV
 	depends on OF_BOARD || OF_SEPARATE
 	help
 	  Offset in the memory where the board configuration DTB is placed.
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/2] xilinx: mbv: Align smode_defconfig with upstream QEMU
  2024-11-01  9:49 [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location Michal Simek
@ 2024-11-01  9:49 ` Michal Simek
  2024-11-06 11:25   ` Leo Liang
  2024-11-07  4:21   ` Begari, Padmarao
  2024-11-06 11:41 ` [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location Leo Liang
  2024-11-07  4:20 ` Begari, Padmarao
  2 siblings, 2 replies; 6+ messages in thread
From: Michal Simek @ 2024-11-01  9:49 UTC (permalink / raw)
  To: u-boot, git; +Cc: Leo Yu-Chi Liang, Padmarao Begari, Tom Rini

Align smode defconfig with upstream QEMU. It could be the part of commit
9d688e6da5c9 ("riscv: mbv: Align DT with QEMU").

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 configs/xilinx_mbv32_smode_defconfig | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/configs/xilinx_mbv32_smode_defconfig b/configs/xilinx_mbv32_smode_defconfig
index 741724f3bdae..820681d505b7 100644
--- a/configs/xilinx_mbv32_smode_defconfig
+++ b/configs/xilinx_mbv32_smode_defconfig
@@ -2,13 +2,13 @@ CONFIG_RISCV=y
 CONFIG_SYS_MALLOC_LEN=0xe00000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x21200000
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81200000
 CONFIG_ENV_SIZE=0x20000
 CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv32"
-CONFIG_SPL_STACK=0x20200000
-CONFIG_SPL_BSS_START_ADDR=0x24000000
+CONFIG_SPL_STACK=0x80200000
+CONFIG_SPL_BSS_START_ADDR=0x84000000
 CONFIG_SPL_BSS_MAX_SIZE=0x80000
-CONFIG_SYS_LOAD_ADDR=0x20200000
+CONFIG_SYS_LOAD_ADDR=0x80200000
 CONFIG_SPL_SIZE_LIMIT=0x40000
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0x40600000
@@ -16,12 +16,12 @@ CONFIG_DEBUG_UART_CLOCK=1000000
 CONFIG_SYS_CLK_FREQ=100000000
 CONFIG_BOOT_SCRIPT_OFFSET=0x0
 CONFIG_TARGET_XILINX_MBV=y
-CONFIG_SPL_OPENSBI_LOAD_ADDR=0x20100000
+CONFIG_SPL_OPENSBI_LOAD_ADDR=0x80100000
 CONFIG_RISCV_SMODE=y
 # CONFIG_SPL_SMP is not set
 CONFIG_REMAKE_ELF=y
 CONFIG_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x20200000
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] xilinx: mbv: Align smode_defconfig with upstream QEMU
  2024-11-01  9:49 ` [PATCH 2/2] xilinx: mbv: Align smode_defconfig with upstream QEMU Michal Simek
@ 2024-11-06 11:25   ` Leo Liang
  2024-11-07  4:21   ` Begari, Padmarao
  1 sibling, 0 replies; 6+ messages in thread
From: Leo Liang @ 2024-11-06 11:25 UTC (permalink / raw)
  To: Michal Simek; +Cc: u-boot, git, Padmarao Begari, Tom Rini

On Fri, Nov 01, 2024 at 10:49:54AM +0100, Michal Simek wrote:
> Align smode defconfig with upstream QEMU. It could be the part of commit
> 9d688e6da5c9 ("riscv: mbv: Align DT with QEMU").
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
>  configs/xilinx_mbv32_smode_defconfig | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location
  2024-11-01  9:49 [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location Michal Simek
  2024-11-01  9:49 ` [PATCH 2/2] xilinx: mbv: Align smode_defconfig with upstream QEMU Michal Simek
@ 2024-11-06 11:41 ` Leo Liang
  2024-11-07  4:20 ` Begari, Padmarao
  2 siblings, 0 replies; 6+ messages in thread
From: Leo Liang @ 2024-11-06 11:41 UTC (permalink / raw)
  To: Michal Simek; +Cc: u-boot, git, Padmarao Begari, Tom Rini

On Fri, Nov 01, 2024 at 10:49:53AM +0100, Michal Simek wrote:
> DTB should be also placed to DDR. It should be the part of commit
> 9d688e6da5c9 ("riscv: mbv: Align DT with QEMU").
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
>  board/xilinx/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location
  2024-11-01  9:49 [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location Michal Simek
  2024-11-01  9:49 ` [PATCH 2/2] xilinx: mbv: Align smode_defconfig with upstream QEMU Michal Simek
  2024-11-06 11:41 ` [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location Leo Liang
@ 2024-11-07  4:20 ` Begari, Padmarao
  2 siblings, 0 replies; 6+ messages in thread
From: Begari, Padmarao @ 2024-11-07  4:20 UTC (permalink / raw)
  To: Simek, Michal, u-boot@lists.denx.de, git@xilinx.com
  Cc: Leo Yu-Chi Liang, Tom Rini


> From: Simek, Michal <michal.simek@amd.com>
> Sent: Friday, November 1, 2024 3:20 PM
> To: u-boot@lists.denx.de; git@xilinx.com
> Cc: Leo Yu-Chi Liang <ycliang@andestech.com>; Begari, Padmarao
> <Padmarao.Begari@amd.com>; Tom Rini <trini@konsulko.com>
> Subject: [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location
> 
> DTB should be also placed to DDR. It should be the part of commit
> 9d688e6da5c9 ("riscv: mbv: Align DT with QEMU").
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>

Reviewed-by: Padmarao Begari <padmarao.begari@amd.com>

> ---
> 
>  board/xilinx/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig index
> c7df4ab5781a..0ff8440e6e06 100644
> --- a/board/xilinx/Kconfig
> +++ b/board/xilinx/Kconfig
> @@ -45,7 +45,7 @@ config XILINX_OF_BOARD_DTB_ADDR
>  	default 0x1000 if ARCH_VERSAL || ARCH_VERSAL_NET ||
> ARCH_VERSAL2
>  	default 0x8000 if MICROBLAZE
>  	default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP
> -	default 0x23000000 if TARGET_XILINX_MBV
> +	default 0x83000000 if TARGET_XILINX_MBV
>  	depends on OF_BOARD || OF_SEPARATE
>  	help
>  	  Offset in the memory where the board configuration DTB is placed.
> --
> 2.43.0


^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH 2/2] xilinx: mbv: Align smode_defconfig with upstream QEMU
  2024-11-01  9:49 ` [PATCH 2/2] xilinx: mbv: Align smode_defconfig with upstream QEMU Michal Simek
  2024-11-06 11:25   ` Leo Liang
@ 2024-11-07  4:21   ` Begari, Padmarao
  1 sibling, 0 replies; 6+ messages in thread
From: Begari, Padmarao @ 2024-11-07  4:21 UTC (permalink / raw)
  To: Simek, Michal, u-boot@lists.denx.de, git@xilinx.com
  Cc: Leo Yu-Chi Liang, Tom Rini

> From: Simek, Michal <michal.simek@amd.com>
> Sent: Friday, November 1, 2024 3:20 PM
> To: u-boot@lists.denx.de; git@xilinx.com
> Cc: Leo Yu-Chi Liang <ycliang@andestech.com>; Begari, Padmarao
> <Padmarao.Begari@amd.com>; Tom Rini <trini@konsulko.com>
> Subject: [PATCH 2/2] xilinx: mbv: Align smode_defconfig with upstream QEMU
> 
> Align smode defconfig with upstream QEMU. It could be the part of commit
> 9d688e6da5c9 ("riscv: mbv: Align DT with QEMU").
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>

Reviewed-by: Padmarao Begari <padmarao.begari@amd.com>

> ---
> 
>  configs/xilinx_mbv32_smode_defconfig | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/configs/xilinx_mbv32_smode_defconfig
> b/configs/xilinx_mbv32_smode_defconfig
> index 741724f3bdae..820681d505b7 100644
> --- a/configs/xilinx_mbv32_smode_defconfig
> +++ b/configs/xilinx_mbv32_smode_defconfig
> @@ -2,13 +2,13 @@ CONFIG_RISCV=y
>  CONFIG_SYS_MALLOC_LEN=0xe00000
>  CONFIG_NR_DRAM_BANKS=1
>  CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x21200000
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81200000
>  CONFIG_ENV_SIZE=0x20000
>  CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv32"
> -CONFIG_SPL_STACK=0x20200000
> -CONFIG_SPL_BSS_START_ADDR=0x24000000
> +CONFIG_SPL_STACK=0x80200000
> +CONFIG_SPL_BSS_START_ADDR=0x84000000
>  CONFIG_SPL_BSS_MAX_SIZE=0x80000
> -CONFIG_SYS_LOAD_ADDR=0x20200000
> +CONFIG_SYS_LOAD_ADDR=0x80200000
>  CONFIG_SPL_SIZE_LIMIT=0x40000
>  CONFIG_SPL=y
>  CONFIG_DEBUG_UART_BASE=0x40600000
> @@ -16,12 +16,12 @@ CONFIG_DEBUG_UART_CLOCK=1000000
>  CONFIG_SYS_CLK_FREQ=100000000
>  CONFIG_BOOT_SCRIPT_OFFSET=0x0
>  CONFIG_TARGET_XILINX_MBV=y
> -CONFIG_SPL_OPENSBI_LOAD_ADDR=0x20100000
> +CONFIG_SPL_OPENSBI_LOAD_ADDR=0x80100000
>  CONFIG_RISCV_SMODE=y
>  # CONFIG_SPL_SMP is not set
>  CONFIG_REMAKE_ELF=y
>  CONFIG_FIT=y
> -CONFIG_SPL_LOAD_FIT_ADDRESS=0x20200000
> +CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
>  CONFIG_DISTRO_DEFAULTS=y
>  CONFIG_DISPLAY_CPUINFO=y
>  CONFIG_DISPLAY_BOARDINFO=y
> --
> 2.43.0


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2024-11-07  4:21 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-11-01  9:49 [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location Michal Simek
2024-11-01  9:49 ` [PATCH 2/2] xilinx: mbv: Align smode_defconfig with upstream QEMU Michal Simek
2024-11-06 11:25   ` Leo Liang
2024-11-07  4:21   ` Begari, Padmarao
2024-11-06 11:41 ` [PATCH 1/2] xilinx: mbv: Place DTB by default to DDR location Leo Liang
2024-11-07  4:20 ` Begari, Padmarao

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